From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2BDF8C433E0 for ; Wed, 13 Jan 2021 16:10:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id DD83B23435 for ; Wed, 13 Jan 2021 16:10:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727452AbhAMQKc (ORCPT ); Wed, 13 Jan 2021 11:10:32 -0500 Received: from mail.kernel.org ([198.145.29.99]:40958 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727309AbhAMQKb (ORCPT ); Wed, 13 Jan 2021 11:10:31 -0500 Received: by mail.kernel.org (Postfix) with ESMTPSA id A6D4023435; Wed, 13 Jan 2021 16:09:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1610554191; bh=/V4uSeR8OSBZFOFVIDMw/BcMXL4VolcqPFbIKUiERHo=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=CIcwspXmZRh8pc/udeumy8UpzYBjmrX7dpcqHVBi+30uP1j3j4zU+0B10FqVEKafh zYFna+tu0fTLy5NZW/+OxsohzEOeAjA+CH5Tr1A5js5pnPLHEoc9/gzjUyvx/1p91Y YYwmVWgZAHyoZY4pYdT0ia5ZpErjCFa6mRI4+fPFeYRKY3nUj3aeO2k0e29sjipaFh i8McAAFGMhCslAq/p6obQEr3RbKhxC09pzYp/p0JwRk6SB3DFC3DoaAAYyrj4Qgoax zUHGMwuJv8rPnp6y8Q2ebD+pmNBb3VvMORqK8F/SLQLVb35ax0hThFX/HLs6hksODv YBgNPtvxo0NXA== Date: Wed, 13 Jan 2021 16:09:17 +0000 From: Mark Brown To: Rob Herring Cc: Richard Fitzgerald , kuninori.morimoto.gx@renesas.com, nsaenzjulienne@suse.de, f.fainelli@gmail.com, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, alsa-devel@alsa-project.org, patches@opensource.cirrus.com, bcm-kernel-feedback-list@broadcom.com, linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v4 2/6] dt-bindings: audio-graph-card: Add plls and sysclks properties Message-ID: <20210113160917.GF4641@sirena.org.uk> References: <20210108160501.7638-1-rf@opensource.cirrus.com> <20210108160501.7638-3-rf@opensource.cirrus.com> <20210113152225.GA2334778@robh.at.kernel.org> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="kbCYTQG2MZjuOjyn" Content-Disposition: inline In-Reply-To: <20210113152225.GA2334778@robh.at.kernel.org> X-Cookie: Ignore previous fortune. User-Agent: Mutt/1.10.1 (2018-07-13) Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org --kbCYTQG2MZjuOjyn Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Jan 13, 2021 at 09:22:25AM -0600, Rob Herring wrote: > I'm not sure this makes sense to be generic, but if so, we already have= =20 > the clock binding and should use (and possibly extend) that. > This appears to all be configuration of clocks within the codec, so=20 > these properties belong in the codec or cpu nodes. Right, I think this should just be the clock binding.=20 > > + The PLL id and clock source id are specific to the particular co= mponent > > + so see the relevant component driver for the ids. Typically the This should refer to the bindings for components, not to their drivers. > > + clock source id indicates the pin the source clock is connected = to. > > + The same phandle can appear in multiple entries so that several = plls > > + can be set in the same component. > > + $ref: /schemas/types.yaml#/definitions/phandle-array > > + > > + plls-clocks: > > + $ref: /schemas/types.yaml#/definitions/non-unique-string-array > > + description: | > > + A list of clock names giving the source clock for each setting > > + in the plls property. > > + > > + sysclks: > > + description: | > > + A list of component sysclk settings. There are 4 cells per sysclk > > + setting: > > + - phandle to the node of the codec or cpu component, > > + - component sysclk id, > > + - component clock source id, > > + - direction of the clock: 0 if the clock is an input to the co= mponent, > > + 1 if it is an output. >=20 > A clock provider and consumer would provide the direction. >=20 > > + The sysclk id and clock source id are specific to the particular > > + component so see the relevant component driver for the ids. Typi= cally > > + the clock source id indicates the pin the source clock is connec= ted to. > > + The same phandle can appear in multiple entries so that several = sysclks > > + can be set in the same component. > > + $ref: /schemas/types.yaml#/definitions/phandle-array > > + > > + sysclks-clocks: > > + $ref: /schemas/types.yaml#/definitions/non-unique-string-array > > + description: | > > + A list of clock names giving the source clock for each setting > > + in the sysclks property. > > + > > +dependencies: > > + plls: [ plls-clocks ] > > + sysclks: [ sysclks-clocks ] > > + > > required: > > - dais > > =20 > > --=20 > > 2.20.1 > >=20 --kbCYTQG2MZjuOjyn Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQEzBAABCgAdFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAl//GywACgkQJNaLcl1U h9DmuwgAg4bSMDfqbeSbsp70+FR5h2BrfLgwsLwRE0uEEsHpMnvplu67Sb5EaYg7 43mnbG/ru3uKHlU5gpqyXHFlqCGsbpr3s3+Drn6MfToxDD+lgk38LWADAPwgWOAi /Y3moCJTzxBEq1DuGk8w1PQqllu1+heWuVCiuo7iOXPJwrPhF5qtrL7P/f69RoFD JmfdGqGstHUQRc+rj4r3mGo1+61XFbin0Ptdvm8ST1Zx7D9FOKEfu7gL+UJK6ha8 BfBUFCVU9Ov9zaBi1HRslnVULJ4h0i3JRao7rb2h7ajI9IzCr6PNuPkK1St1DDT6 YJ/zH7Zd13mdMSqHWDgJVcGbPRT3Sg== =zuCm -----END PGP SIGNATURE----- --kbCYTQG2MZjuOjyn--