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From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
To: geert+renesas@glider.be, magnus.damm@gmail.com, robh+dt@kernel.org
Cc: linux-renesas-soc@vger.kernel.org, yusuke.goda.sx@renesas.com,
	devicetree@vger.kernel.org,
	Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Subject: [PATCH v2 2/2] arm64: dts: renesas: r8a77961: Add CAN nodes
Date: Fri, 12 Mar 2021 18:50:30 +0900	[thread overview]
Message-ID: <20210312095030.534957-3-yoshihiro.shimoda.uh@renesas.com> (raw)
In-Reply-To: <20210312095030.534957-1-yoshihiro.shimoda.uh@renesas.com>

Add the device nodes for all CAN nodes on R-Car M3-W+.

Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 arch/arm64/boot/dts/renesas/r8a77961.dtsi | 26 +++++++++++++++++++++--
 1 file changed, 24 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/renesas/r8a77961.dtsi b/arch/arm64/boot/dts/renesas/r8a77961.dtsi
index e8c31ebec097..d44b7fef1e8e 100644
--- a/arch/arm64/boot/dts/renesas/r8a77961.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77961.dtsi
@@ -1155,13 +1155,35 @@ avb: ethernet@e6800000 {
 		};
 
 		can0: can@e6c30000 {
+			compatible = "renesas,can-r8a77961",
+				     "renesas,rcar-gen3-can";
 			reg = <0 0xe6c30000 0 0x1000>;
-			/* placeholder */
+			interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 916>,
+			       <&cpg CPG_CORE R8A77961_CLK_CANFD>,
+			       <&can_clk>;
+			clock-names = "clkp1", "clkp2", "can_clk";
+			assigned-clocks = <&cpg CPG_CORE R8A77961_CLK_CANFD>;
+			assigned-clock-rates = <40000000>;
+			power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
+			resets = <&cpg 916>;
+			status = "disabled";
 		};
 
 		can1: can@e6c38000 {
+			compatible = "renesas,can-r8a77961",
+				     "renesas,rcar-gen3-can";
 			reg = <0 0xe6c38000 0 0x1000>;
-			/* placeholder */
+			interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 915>,
+			       <&cpg CPG_CORE R8A77961_CLK_CANFD>,
+			       <&can_clk>;
+			clock-names = "clkp1", "clkp2", "can_clk";
+			assigned-clocks = <&cpg CPG_CORE R8A77961_CLK_CANFD>;
+			assigned-clock-rates = <40000000>;
+			power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
+			resets = <&cpg 915>;
+			status = "disabled";
 		};
 
 		pwm0: pwm@e6e30000 {
-- 
2.25.1


      parent reply	other threads:[~2021-03-12  9:55 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-12  9:50 [PATCH v2 0/2] treewide: Add CAN support for r8a77961 Yoshihiro Shimoda
2021-03-12  9:50 ` [PATCH v2 1/2] dt-bindings: net: can: rcar_can: Document r8a77961 support Yoshihiro Shimoda
2021-03-12  9:52   ` Geert Uytterhoeven
2021-03-24 16:02   ` Rob Herring
2021-04-01  7:22   ` Wolfram Sang
2021-04-08 14:21   ` Wolfram Sang
2021-04-08 23:34     ` Yoshihiro Shimoda
2021-03-12  9:50 ` Yoshihiro Shimoda [this message]

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