From: Dario Binacchi <dariobin@libero.it>
To: linux-kernel@vger.kernel.org
Cc: "Dario Binacchi" <dariobin@libero.it>,
"Tero Kristo" <kristo@kernel.org>,
"Grygorii Strashko" <grygorii.strashko@ti.com>,
"Benoît Cousson" <bcousson@baylibre.com>,
"Rob Herring" <robh+dt@kernel.org>,
"Tony Lindgren" <tony@atomide.com>,
devicetree@vger.kernel.org, linux-omap@vger.kernel.org
Subject: [PATCH v5 3/5] ARM: dts: am33xx-clocks: add spread spectrum support
Date: Sun, 18 Apr 2021 16:56:53 +0200 [thread overview]
Message-ID: <20210418145655.10415-4-dariobin@libero.it> (raw)
In-Reply-To: <20210418145655.10415-1-dariobin@libero.it>
Registers for adjusting the spread spectrum clocking (SSC) have been
added. As reported by the TI spruh73x RM, SSC is supported only for LCD
and MPU PLLs, but the CM_SSC_DELTAMSTEP_DPLL_XXX and
CM_SSC_MODFREQDIV_DPLL_XXX registers, as well as the enable field in the
CM_CLKMODE_DPLL_XXX registers are mapped for all PLLs (CORE, MPU, DDR,
PER, DISP).
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Acked-by: Tony Lindgren <tony@atomide.com>
---
(no changes since v4)
Changes in v4:
- Add SSC registers for CORE, DDR and PER PLLs.
- Update commit message.
Changes in v3:
- Add Tony Lindgren acked tag.
Changes in v2:
- Remove SSC registers from dpll_core_ck@490 node (SSC is not supported)
- Add SSC registers to dpll_mpu_ck@488 node.
arch/arm/boot/dts/am33xx-clocks.dtsi | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/am33xx-clocks.dtsi b/arch/arm/boot/dts/am33xx-clocks.dtsi
index dced92a8970e..b7b7106f2dee 100644
--- a/arch/arm/boot/dts/am33xx-clocks.dtsi
+++ b/arch/arm/boot/dts/am33xx-clocks.dtsi
@@ -164,7 +164,7 @@
#clock-cells = <0>;
compatible = "ti,am3-dpll-core-clock";
clocks = <&sys_clkin_ck>, <&sys_clkin_ck>;
- reg = <0x0490>, <0x045c>, <0x0468>;
+ reg = <0x0490>, <0x045c>, <0x0468>, <0x0460>, <0x0464>;
};
dpll_core_x2_ck: dpll_core_x2_ck {
@@ -204,7 +204,7 @@
#clock-cells = <0>;
compatible = "ti,am3-dpll-clock";
clocks = <&sys_clkin_ck>, <&sys_clkin_ck>;
- reg = <0x0488>, <0x0420>, <0x042c>;
+ reg = <0x0488>, <0x0420>, <0x042c>, <0x0424>, <0x0428>;
};
dpll_mpu_m2_ck: dpll_mpu_m2_ck@4a8 {
@@ -220,7 +220,7 @@
#clock-cells = <0>;
compatible = "ti,am3-dpll-no-gate-clock";
clocks = <&sys_clkin_ck>, <&sys_clkin_ck>;
- reg = <0x0494>, <0x0434>, <0x0440>;
+ reg = <0x0494>, <0x0434>, <0x0440>, <0x0438>, <0x043c>;
};
dpll_ddr_m2_ck: dpll_ddr_m2_ck@4a0 {
@@ -244,7 +244,7 @@
#clock-cells = <0>;
compatible = "ti,am3-dpll-no-gate-clock";
clocks = <&sys_clkin_ck>, <&sys_clkin_ck>;
- reg = <0x0498>, <0x0448>, <0x0454>;
+ reg = <0x0498>, <0x0448>, <0x0454>, <0x044c>, <0x0450>;
};
dpll_disp_m2_ck: dpll_disp_m2_ck@4a4 {
@@ -261,7 +261,7 @@
#clock-cells = <0>;
compatible = "ti,am3-dpll-no-gate-j-type-clock";
clocks = <&sys_clkin_ck>, <&sys_clkin_ck>;
- reg = <0x048c>, <0x0470>, <0x049c>;
+ reg = <0x048c>, <0x0470>, <0x049c>, <0x0474>, <0x0478>;
};
dpll_per_m2_ck: dpll_per_m2_ck@4ac {
--
2.17.1
next prev parent reply other threads:[~2021-04-18 14:58 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-18 14:56 [PATCH v5 0/5] clk: ti: add am33xx spread spectrum clock support Dario Binacchi
2021-04-18 14:56 ` [PATCH v5 2/5] dt-bindings: ti: dpll: add spread spectrum support Dario Binacchi
2021-04-18 14:56 ` Dario Binacchi [this message]
2021-04-18 14:56 ` [PATCH v5 4/5] ARM: dts: am43xx-clocks: " Dario Binacchi
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