From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 48B58C43462 for ; Sun, 16 May 2021 23:06:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 24D816115C for ; Sun, 16 May 2021 23:06:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232112AbhEPXHh (ORCPT ); Sun, 16 May 2021 19:07:37 -0400 Received: from mx2.suse.de ([195.135.220.15]:44012 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231936AbhEPXHg (ORCPT ); Sun, 16 May 2021 19:07:36 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) by mx2.suse.de (Postfix) with ESMTP id 853EDB1DA; Sun, 16 May 2021 23:06:20 +0000 (UTC) From: =?UTF-8?q?Andreas=20F=C3=A4rber?= To: linux-rockchip@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?UTF-8?q?Andreas=20F=C3=A4rber?= , Rob Herring , Heiko Stuebner , devicetree@vger.kernel.org Subject: [PATCH 4/9] arm64: dts: rockchip: Add Rockchip TB-RK1808M0 Date: Mon, 17 May 2021 01:05:46 +0200 Message-Id: <20210516230551.12469-5-afaerber@suse.de> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210516230551.12469-1-afaerber@suse.de> References: <20210516230551.12469-1-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add an initial Device Tree for Rockchip Toybrick TB-RK1808M0 mPCIe card. Based on shipping TB-RK1808M0 DTB. Signed-off-by: Andreas Färber --- arch/arm64/boot/dts/rockchip/Makefile | 1 + .../boot/dts/rockchip/rk1808k-toybrick-m0.dts | 55 +++++++++++++++++++ 2 files changed, 56 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk1808k-toybrick-m0.dts diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index c3e00c0e2db7..d5a3837ccb7c 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -3,6 +3,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-engicam-px30-core-ctouch2.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-engicam-px30-core-ctouch2-of10.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-engicam-px30-core-edimm2.2.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk1808k-toybrick-m0.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-evb.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-roc-cc.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3318-a95x-z2.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk1808k-toybrick-m0.dts b/arch/arm64/boot/dts/rockchip/rk1808k-toybrick-m0.dts new file mode 100644 index 000000000000..2f8075d2391c --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk1808k-toybrick-m0.dts @@ -0,0 +1,55 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) +/* + * Copyright (c) 2021 Andreas Färber + */ + +/dts-v1/; + +#include "rk1808.dtsi" + +/ { + compatible = "rockchip,tb-rk1808m0", "rockchip,rk1808"; + model = "Rockchip Toybrick TB-RK1808M0"; + + chosen { + stdout-path = "serial2:1500000n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x40000000>; + }; + + vcc3v3_pcie: vcc3v3-pcie { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_pcie"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + vdd_cpu: vdd-cpu { + compatible = "regulator-fixed"; + regulator-name = "vdd_cpu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + vin-supply = <&vcc3v3_pcie>; + }; +}; + +&cpu0 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu1 { + cpu-supply = <&vdd_cpu>; +}; + +&uart2 { + status = "okay"; + clocks = <&xin24m>; + clock-names = "baudclk"; +}; -- 2.31.1