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From: Rob Herring <robh@kernel.org>
To: Jagan Teki <jagan@amarulasolutions.com>
Cc: Inki Dae <inki.dae@samsung.com>,
	Joonyoung Shim <jy0922.shim@samsung.com>,
	Seung-Woo Kim <sw0312.kim@samsung.com>,
	Kyungmin Park <kyungmin.park@samsung.com>,
	Andrzej Hajda <a.hajda@samsung.com>,
	Neil Armstrong <narmstrong@baylibre.com>,
	Robert Foss <robert.foss@linaro.org>,
	Laurent Pinchart <Laurent.pinchart@ideasonboard.com>,
	Frieder Schrempf <frieder.schrempf@kontron.de>,
	Daniel Vetter <daniel.vetter@intel.com>,
	Marek Vasut <marex@denx.de>,
	Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>,
	Fabio Estevam <festevam@gmail.com>,
	dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
	linux-samsung-soc@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	NXP Linux Team <linux-imx@nxp.com>,
	linux-amarula <linux-amarula@amarulasolutions.com>
Subject: Re: [RFC PATCH 08/17] dt-bindings: display: bridge: Add Samsung MIPI DSIM bridge
Date: Mon, 12 Jul 2021 09:13:22 -0600	[thread overview]
Message-ID: <20210712151322.GA1931925@robh.at.kernel.org> (raw)
In-Reply-To: <20210704090230.26489-9-jagan@amarulasolutions.com>

On Sun, Jul 04, 2021 at 02:32:21PM +0530, Jagan Teki wrote:
> Samsing MIPI DSIM bridge can be found on Exynos and NXP's
> i.MX8M Mini and Nano SoC's.
> 
> This dt-bindings replaces legacy exynos_dsim.txt.
> 
> Used the example node from latest Exynos SoC instead of
> the one used in legacy exynos_dsim.txt.
> 
> Add dt-bingings for it.

typo

> 
> Cc: Rob Herring <robh+dt@kernel.org>
> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> ---
>  .../display/bridge/samsung,mipi-dsim.yaml     | 278 ++++++++++++++++++
>  .../bindings/display/exynos/exynos_dsim.txt   |  90 ------
>  MAINTAINERS                                   |   1 +
>  3 files changed, 279 insertions(+), 90 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/display/bridge/samsung,mipi-dsim.yaml
>  delete mode 100644 Documentation/devicetree/bindings/display/exynos/exynos_dsim.txt
> 
> diff --git a/Documentation/devicetree/bindings/display/bridge/samsung,mipi-dsim.yaml b/Documentation/devicetree/bindings/display/bridge/samsung,mipi-dsim.yaml
> new file mode 100644
> index 000000000000..b2970734ffd7
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/bridge/samsung,mipi-dsim.yaml
> @@ -0,0 +1,278 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/bridge/samsung,mipi-dsim.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Samsung MIPI DSIM bridge controller
> +
> +maintainers:
> +  - Inki Dae <inki.dae@samsung.com>
> +  - Joonyoung Shim <jy0922.shim@samsung.com>
> +  - Seung-Woo Kim <sw0312.kim@samsung.com>
> +  - Kyungmin Park <kyungmin.park@samsung.com>
> +  - Andrzej Hajda <a.hajda@samsung.com>
> +  - Jagan Teki <jagan@amarulasolutions.com>
> +
> +description: |
> +  Samsung MIPI DSIM bridge controller can be found it on Exynos
> +  and i.MX8M Mini and Nano SoC's.
> +
> +properties:
> +  compatible:
> +    enum:
> +      - samsung,exynos3250-mipi-dsi
> +      - samsung,exynos4210-mipi-dsi
> +      - samsung,exynos5410-mipi-dsi
> +      - samsung,exynos5422-mipi-dsi
> +      - samsung,exynos5433-mipi-dsi

What about i.MX compatibles?

> +
> +  reg:
> +    maxItems: 1
> +
> +  interrupts:
> +    maxItems: 1
> +
> +  '#address-cells':
> +    const: 1
> +
> +  '#size-cells':
> +    const: 0
> +
> +  clocks:
> +    minItems: 2
> +    maxItems: 5
> +
> +  clock-names:
> +    minItems: 2
> +    maxItems: 5
> +
> +  phys:
> +    maxItems: 1
> +    description: phandle to the phy module representing the DPHY

Drop

> +
> +  phy-names:
> +    items:
> +      - const: dsim
> +
> +  samsung,phy-type:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    description: phandle to the samsung phy-type
> +
> +  power-domains:
> +    description: phandle to the associated power domain

Drop

> +    maxItems: 1
> +
> +  samsung,power-domain:
> +    $ref: /schemas/types.yaml#/definitions/phandle
> +    description: phandle to the associated samsung power domain
> +    maxItems: 1
> +
> +  vddcore-supply:
> +    description: MIPI DSIM Core voltage supply (e.g. 1.1V)
> +
> +  vddio-supply:
> +    description: MIPI DSIM I/O and PLL voltage supply (e.g. 1.8V)
> +
> +  samsung,burst-clock-frequency:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    description:
> +      DSIM high speed burst mode frequency.
> +
> +  samsung,esc-clock-frequency:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    description:
> +      DSIM escape mode frequency.
> +
> +  samsung,pll-clock-frequency:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    description:
> +      DSIM oscillator clock frequency.
> +
> +  ports:
> +    $ref: /schemas/graph.yaml#/properties/ports
> +
> +    properties:
> +      port@0:
> +        $ref: /schemas/graph.yaml#/$defs/port-base

If there are no extra endpoint properties, then use 
'/schemas/graph.yaml#/properties/port'.

> +        description:
> +          Input port node to receive pixel data from the
> +          display controller. Exactly one endpoint must be
> +          specified.
> +        properties:
> +          endpoint@0:
> +            $ref: /schemas/graph.yaml#/properties/endpoint
> +            description: sub-node describing the input from MIC

I'd assume i.MX has a different input than MIC?

> +
> +        unevaluatedProperties: false
> +
> +      port@1:
> +        $ref: /schemas/graph.yaml#/properties/port
> +        description:
> +          DSI output port node to the panel or the next bridge
> +          in the chain
> +
> +required:
> +  - '#address-cells'
> +  - '#size-cells'
> +  - clock-names
> +  - clocks
> +  - compatible
> +  - interrupts
> +  - phy-names
> +  - phys
> +  - reg
> +  - samsung,burst-clock-frequency
> +  - samsung,esc-clock-frequency
> +  - samsung,pll-clock-frequency
> +
> +allOf:
> +  - $ref: ../dsi-controller.yaml#
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: samsung,exynos5433-mipi-dsi
> +
> +    then:
> +      properties:
> +        clocks:
> +          minItems: 5
> +
> +        clock-names:
> +          items:
> +            - const: bus_clk
> +            - const: phyclk_mipidphy0_bitclkdiv8
> +            - const: phyclk_mipidphy0_rxclkesc0
> +            - const: sclk_rgb_vclk_to_dsim0
> +            - const: sclk_mipi
> +
> +        ports:
> +          required:
> +            - port@0
> +
> +      required:
> +        - ports
> +        - vddcore-supply
> +        - vddio-supply
> +
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: samsung,exynos5410-mipi-dsi
> +
> +    then:
> +      properties:
> +        clocks:
> +          minItems: 2
> +
> +        clock-names:
> +          items:
> +            - const: bus_clk
> +            - const: pll_clk
> +
> +      required:
> +        - vddcore-supply
> +        - vddio-supply
> +
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: samsung,exynos4210-mipi-dsi
> +
> +    then:
> +      properties:
> +        clocks:
> +          minItems: 2
> +
> +        clock-names:
> +          items:
> +            - const: bus_clk
> +            - const: sclk_mipi
> +
> +      required:
> +        - vddcore-supply
> +        - vddio-supply
> +
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: samsung,exynos3250-mipi-dsi
> +
> +    then:
> +      properties:
> +        clocks:
> +          minItems: 2
> +
> +        clock-names:
> +          items:
> +            - const: bus_clk
> +            - const: pll_clk
> +
> +      required:
> +        - vddcore-supply
> +        - vddio-supply
> +        - samsung,phy-type
> +
> +additionalProperties:
> +  type: object
> +
> +examples:
> +  - |
> +    #include <dt-bindings/clock/exynos5433.h>
> +    #include <dt-bindings/gpio/gpio.h>
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> +    dsi@13900000 {
> +       compatible = "samsung,exynos5433-mipi-dsi";
> +       reg = <0x13900000 0xC0>;
> +       interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
> +       phys = <&mipi_phy 1>;
> +       phy-names = "dsim";
> +       clocks = <&cmu_disp CLK_PCLK_DSIM0>,
> +                <&cmu_disp CLK_PHYCLK_MIPIDPHY0_BITCLKDIV8>,
> +                <&cmu_disp CLK_PHYCLK_MIPIDPHY0_RXCLKESC0>,
> +                <&cmu_disp CLK_SCLK_RGB_VCLK_TO_DSIM0>,
> +                <&cmu_disp CLK_SCLK_DSIM0>;
> +       clock-names = "bus_clk",
> +                     "phyclk_mipidphy0_bitclkdiv8",
> +                     "phyclk_mipidphy0_rxclkesc0",
> +                     "sclk_rgb_vclk_to_dsim0",
> +                     "sclk_mipi";
> +       power-domains = <&pd_disp>;
> +       vddcore-supply = <&ldo6_reg>;
> +       vddio-supply = <&ldo7_reg>;
> +       samsung,burst-clock-frequency = <512000000>;
> +       samsung,esc-clock-frequency = <16000000>;
> +       samsung,pll-clock-frequency = <24000000>;
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&te_irq>;
> +       status = "disabled";
> +       #address-cells = <1>;
> +       #size-cells = <0>;
> +
> +       panel@0 {
> +          compatible = "samsung,s6e3ha2";
> +          reg = <0>;
> +          vdd3-supply = <&ldo27_reg>;
> +          vci-supply = <&ldo28_reg>;
> +          reset-gpios = <&gpg0 0 GPIO_ACTIVE_LOW>;
> +          enable-gpios = <&gpf1 5 GPIO_ACTIVE_HIGH>;
> +       };
> +
> +       ports {
> +          #address-cells = <1>;
> +          #size-cells = <0>;
> +
> +          port@0 {
> +             reg = <0>;
> +
> +             dsi_to_mic: endpoint {
> +                remote-endpoint = <&mic_to_dsi>;
> +             };
> +          };
> +       };
> +    };
> diff --git a/Documentation/devicetree/bindings/display/exynos/exynos_dsim.txt b/Documentation/devicetree/bindings/display/exynos/exynos_dsim.txt
> deleted file mode 100644
> index be377786e8cd..000000000000
> --- a/Documentation/devicetree/bindings/display/exynos/exynos_dsim.txt
> +++ /dev/null
> @@ -1,90 +0,0 @@
> -Exynos MIPI DSI Master
> -
> -Required properties:
> -  - compatible: value should be one of the following
> -		"samsung,exynos3250-mipi-dsi" /* for Exynos3250/3472 SoCs */
> -		"samsung,exynos4210-mipi-dsi" /* for Exynos4 SoCs */
> -		"samsung,exynos5410-mipi-dsi" /* for Exynos5410/5420/5440 SoCs */
> -		"samsung,exynos5422-mipi-dsi" /* for Exynos5422/5800 SoCs */
> -		"samsung,exynos5433-mipi-dsi" /* for Exynos5433 SoCs */
> -  - reg: physical base address and length of the registers set for the device
> -  - interrupts: should contain DSI interrupt
> -  - clocks: list of clock specifiers, must contain an entry for each required
> -    entry in clock-names
> -  - clock-names: should include "bus_clk"and "sclk_mipi" entries
> -		 the use of "pll_clk" is deprecated
> -  - phys: list of phy specifiers, must contain an entry for each required
> -    entry in phy-names
> -  - phy-names: should include "dsim" entry
> -  - vddcore-supply: MIPI DSIM Core voltage supply (e.g. 1.1V)
> -  - vddio-supply: MIPI DSIM I/O and PLL voltage supply (e.g. 1.8V)
> -  - samsung,pll-clock-frequency: specifies frequency of the oscillator clock
> -  - #address-cells, #size-cells: should be set respectively to <1> and <0>
> -    according to DSI host bindings (see MIPI DSI bindings [1])
> -  - samsung,burst-clock-frequency: specifies DSI frequency in high-speed burst
> -    mode
> -  - samsung,esc-clock-frequency: specifies DSI frequency in escape mode
> -
> -Optional properties:
> -  - power-domains: a phandle to DSIM power domain node
> -
> -Child nodes:
> -  Should contain DSI peripheral nodes (see MIPI DSI bindings [1]).
> -
> -Video interfaces:
> -  Device node can contain following video interface port nodes according to [2]:
> -  0: RGB input,
> -  1: DSI output
> -
> -[1]: Documentation/devicetree/bindings/display/mipi-dsi-bus.txt
> -[2]: Documentation/devicetree/bindings/media/video-interfaces.txt
> -
> -Example:
> -
> -	dsi@11c80000 {
> -		compatible = "samsung,exynos4210-mipi-dsi";
> -		reg = <0x11C80000 0x10000>;
> -		interrupts = <0 79 0>;
> -		clocks = <&clock 286>, <&clock 143>;
> -		clock-names = "bus_clk", "sclk_mipi";
> -		phys = <&mipi_phy 1>;
> -		phy-names = "dsim";
> -		vddcore-supply = <&vusb_reg>;
> -		vddio-supply = <&vmipi_reg>;
> -		power-domains = <&pd_lcd0>;
> -		#address-cells = <1>;
> -		#size-cells = <0>;
> -		samsung,pll-clock-frequency = <24000000>;
> -
> -		panel@1 {
> -			reg = <0>;
> -			...
> -			port {
> -				panel_ep: endpoint {
> -					remote-endpoint = <&dsi_ep>;
> -				};
> -			};
> -		};
> -
> -		ports {
> -			#address-cells = <1>;
> -			#size-cells = <0>;
> -
> -			port@0 {
> -				reg = <0>;
> -				decon_to_mic: endpoint {
> -					remote-endpoint = <&mic_to_decon>;
> -				};
> -			};
> -
> -			port@1 {
> -				reg = <1>;
> -				dsi_ep: endpoint {
> -					reg = <0>;
> -					samsung,burst-clock-frequency = <500000000>;
> -					samsung,esc-clock-frequency = <20000000>;
> -					remote-endpoint = <&panel_ep>;
> -				};
> -			};
> -		};
> -	};
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 733c2ebc0393..e571fc7792aa 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -5873,6 +5873,7 @@ M:	Andrzej Hajda <a.hajda@samsung.com>
>  M:	Jagan Teki <jagan@amarulasolutions.com>
>  S:	Maintained
>  T:	git git://anongit.freedesktop.org/drm/drm-misc
> +F:	Documentation/devicetree/bindings/display/bridge/samsung,mipi-dsim.yaml
>  F:	drivers/gpu/drm/bridge/samsung-dsim.c
>  
>  DRM DRIVER FOR SITRONIX ST7703 PANELS
> -- 
> 2.25.1
> 
> 

  reply	other threads:[~2021-07-12 15:13 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-04  9:02 [RFC PATCH 00/17] drm: bridge: " Jagan Teki
2021-07-04  9:02 ` [RFC PATCH 01/17] drm/exynos: dsi: Convert to bridge driver Jagan Teki
2021-07-04  9:02 ` [RFC PATCH 02/17] drm/exynos: dsi: Handle drm_device for bridge Jagan Teki
2021-07-04  9:02 ` [RFC PATCH 03/17] drm/exynos: dsi: Use the drm_panel_bridge API Jagan Teki
2021-07-05 11:47   ` Marek Szyprowski
2021-07-05 12:00     ` Jagan Teki
2021-07-05 12:13       ` Marek Szyprowski
2021-07-05 12:34         ` Jagan Teki
2021-07-04  9:02 ` [RFC PATCH 04/17] drm/exynos: dsi: Create bridge connector for encoder Jagan Teki
2021-07-04  9:02 ` [RFC PATCH 05/17] drm/exynos: dsi: Get the mode from bridge Jagan Teki
2021-07-29 13:20   ` Robert Foss
2021-07-04  9:02 ` [RFC PATCH 06/17] drm/exynos: dsi: Handle exynos specifics via driver_data Jagan Teki
     [not found]   ` <YP2el40V3K4R7ner@ravnborg.org>
2021-07-25 17:31     ` Jagan Teki
2021-08-13  6:50     ` Inki Dae
2021-08-13 12:16       ` Laurent Pinchart
2021-08-18  6:09         ` Inki Dae
2021-07-04  9:02 ` [RFC PATCH 07/17] drm: bridge: Move exynos_drm_dsi into bridges Jagan Teki
2021-07-04  9:02 ` [RFC PATCH 08/17] dt-bindings: display: bridge: Add Samsung MIPI DSIM bridge Jagan Teki
2021-07-12 15:13   ` Rob Herring [this message]
2021-07-12 15:23     ` Jagan Teki
2021-07-04  9:02 ` [RFC PATCH 09/17] drm: bridge: samsung-dsim: Add module init, exit Jagan Teki
2021-07-04  9:02 ` [RFC PATCH 10/17] drm: bridge: samsung-dsim: Update the of_node for port(s) Jagan Teki
2021-07-04  9:02 ` [RFC PATCH 11/17] drm: bridge: samsung-dsim: Find the possible DSI devices Jagan Teki
2021-07-04  9:02 ` [RFC PATCH 12/17] dt-bindings: display: bridge: samsung,mipi-dsim: Add i.MX8MM support Jagan Teki
2021-07-14 22:59   ` Rob Herring
2021-07-04  9:02 ` [RFC PATCH 13/17] drm: bridge: samsung-dsim: " Jagan Teki
2021-07-04  9:02 ` [RFC PATCH 14/17] drm: bridge: samsung-dsim: Add input_bus_flags Jagan Teki
2021-07-04  9:02 ` [RFC PATCH 15/17] drm: bridge: samsung-dsim: Move DSI init in bridge enable Jagan Teki
2021-07-04  9:02 ` [RFC PATCH 16/17] drm: bridge: samsung-dsim: Fix PLL_P offset Jagan Teki
2021-07-04  9:02 ` [RFC PATCH 17/17] drm: bridge: samsung-dsim: Add bridge mode_fixup Jagan Teki
     [not found] ` <YP2ZvoVQyvwTXP++@ravnborg.org>
2021-07-25 17:13   ` [RFC PATCH 00/17] drm: bridge: Samsung MIPI DSIM bridge Jagan Teki
2021-10-05 21:43     ` Tim Harvey
2021-12-09  8:36       ` Michael Nazzareno Trimarchi
2021-12-09 16:40         ` Tim Harvey
2021-12-09 17:09           ` Michael Nazzareno Trimarchi
2021-12-09 17:57             ` Tim Harvey
2021-12-09 20:24             ` Lucas Stach
2021-12-09 21:24               ` Michael Nazzareno Trimarchi
2021-12-15 13:34                 ` Adam Ford

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