From: Adam Ford <aford173@gmail.com>
To: linux-arm-kernel@lists.infradead.org
Cc: laurent.pinchart@ideasonboard.com, tharvey@gateworks.com,
aford@beaconembedded.com, Adam Ford <aford173@gmail.com>,
Fabio Estevam <festevam@gmail.com>,
Rob Herring <robh+dt@kernel.org>, Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
NXP Linux Team <linux-imx@nxp.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
Lucas Stach <l.stach@pengutronix.de>, Peng Fan <peng.fan@nxp.com>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH V3 2/5] arm64: dts: imx8mm: Add CSI nodes
Date: Sun, 28 Nov 2021 06:50:08 -0600 [thread overview]
Message-ID: <20211128125011.12817-2-aford173@gmail.com> (raw)
In-Reply-To: <20211128125011.12817-1-aford173@gmail.com>
There is a csi bridge and csis interface that tie together
to allow csi2 capture.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Tim Harvey <tharvey@gateworks.com>
Tested-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
---
V3: No Change
V2: No Change
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 51 +++++++++++++++++++++++
1 file changed, 51 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index 5b9c2cca9ac4..a31cf2b9769c 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -1096,6 +1096,22 @@ aips4: bus@32c00000 {
#size-cells = <1>;
ranges = <0x32c00000 0x32c00000 0x400000>;
+ csi: csi@32e20000 {
+ compatible = "fsl,imx8mm-csi", "fsl,imx7-csi";
+ reg = <0x32e20000 0x1000>;
+ interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MM_CLK_CSI1_ROOT>;
+ clock-names = "mclk";
+ power-domains = <&disp_blk_ctrl IMX8MM_DISPBLK_PD_CSI_BRIDGE>;
+ status = "disabled";
+
+ port {
+ csi_in: endpoint {
+ remote-endpoint = <&imx8mm_mipi_csi_out>;
+ };
+ };
+ };
+
disp_blk_ctrl: blk-ctrl@32e28000 {
compatible = "fsl,imx8mm-disp-blk-ctrl", "syscon";
reg = <0x32e28000 0x100>;
@@ -1123,6 +1139,41 @@ disp_blk_ctrl: blk-ctrl@32e28000 {
#power-domain-cells = <1>;
};
+ mipi_csi: mipi-csi@32e30000 {
+ compatible = "fsl,imx8mm-mipi-csi2";
+ reg = <0x32e30000 0x1000>;
+ interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+ assigned-clocks = <&clk IMX8MM_CLK_CSI1_CORE>,
+ <&clk IMX8MM_CLK_CSI1_PHY_REF>;
+ assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_1000M>,
+ <&clk IMX8MM_SYS_PLL2_1000M>;
+ clock-frequency = <333000000>;
+ clocks = <&clk IMX8MM_CLK_DISP_APB_ROOT>,
+ <&clk IMX8MM_CLK_CSI1_ROOT>,
+ <&clk IMX8MM_CLK_CSI1_PHY_REF>,
+ <&clk IMX8MM_CLK_DISP_AXI_ROOT>;
+ clock-names = "pclk", "wrap", "phy", "axi";
+ power-domains = <&disp_blk_ctrl IMX8MM_DISPBLK_PD_MIPI_CSI>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ };
+
+ port@1 {
+ reg = <1>;
+
+ imx8mm_mipi_csi_out: endpoint {
+ remote-endpoint = <&csi_in>;
+ };
+ };
+ };
+ };
+
usbotg1: usb@32e40000 {
compatible = "fsl,imx8mm-usb", "fsl,imx7d-usb";
reg = <0x32e40000 0x200>;
--
2.32.0
next prev parent reply other threads:[~2021-11-28 12:52 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-28 12:50 [PATCH V3 1/5] soc: imx: imx8m-blk-ctrl: Fix imx8mm mipi reset Adam Ford
2021-11-28 12:50 ` Adam Ford [this message]
2021-11-28 12:50 ` [PATCH V3 3/5] arm64: defconfig: Enable VIDEO_IMX_MEDIA Adam Ford
2021-11-28 12:50 ` [PATCH V3 4/5] arm64: dts: imx8mm-beacon: Enable OV5640 Camera Adam Ford
2021-11-28 12:50 ` [PATCH V3 5/5] arm64: defconfig: Enable OV5640 Adam Ford
2021-11-28 14:26 ` [PATCH V3 1/5] soc: imx: imx8m-blk-ctrl: Fix imx8mm mipi reset Laurent Pinchart
2021-11-29 22:26 ` Tim Harvey
2021-12-06 2:36 ` Shawn Guo
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