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From: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
To: Rob Herring <robh+dt@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Ulf Hansson <ulf.hansson@linaro.org>,
	Dinh Nguyen <dinguyen@kernel.org>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-clk@vger.kernel.org, linux-mmc@vger.kernel.org
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Subject: [PATCH 08/19] dt-bindings: clock: intel,stratix10: convert to dtschema
Date: Mon, 27 Dec 2021 14:35:47 +0100	[thread overview]
Message-ID: <20211227133558.135185-2-krzysztof.kozlowski@canonical.com> (raw)
In-Reply-To: <20211227133131.134369-1-krzysztof.kozlowski@canonical.com>

Convert the Intel Stratix 10 clock controller bindings to DT schema format.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
---
 .../bindings/clock/intc_stratix10.txt         | 20 -----------
 .../bindings/clock/intel,stratix10.yaml       | 35 +++++++++++++++++++
 2 files changed, 35 insertions(+), 20 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/clock/intc_stratix10.txt
 create mode 100644 Documentation/devicetree/bindings/clock/intel,stratix10.yaml

diff --git a/Documentation/devicetree/bindings/clock/intc_stratix10.txt b/Documentation/devicetree/bindings/clock/intc_stratix10.txt
deleted file mode 100644
index 9f4ec5cb5c6b..000000000000
--- a/Documentation/devicetree/bindings/clock/intc_stratix10.txt
+++ /dev/null
@@ -1,20 +0,0 @@
-Device Tree Clock bindings for Intel's SoCFPGA Stratix10 platform
-
-This binding uses the common clock binding[1].
-
-[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
-
-Required properties:
-- compatible : shall be
-	"intel,stratix10-clkmgr"
-
-- reg : shall be the control register offset from CLOCK_MANAGER's base for the clock.
-
-- #clock-cells : from common clock binding, shall be set to 1.
-
-Example:
-	clkmgr: clock-controller@ffd10000 {
-		compatible = "intel,stratix10-clkmgr";
-		reg = <0xffd10000 0x1000>;
-		#clock-cells = <1>;
-	};
diff --git a/Documentation/devicetree/bindings/clock/intel,stratix10.yaml b/Documentation/devicetree/bindings/clock/intel,stratix10.yaml
new file mode 100644
index 000000000000..f506e3db9782
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/intel,stratix10.yaml
@@ -0,0 +1,35 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/intel,stratix10.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Intel SoCFPGA Stratix10 platform clock controller binding
+
+maintainers:
+  - Dinh Nguyen <dinguyen@kernel.org>
+
+properties:
+  compatible:
+    const: intel,stratix10-clkmgr
+
+  '#clock-cells':
+    const: 1
+
+  reg:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+  - '#clock-cells'
+
+additionalProperties: false
+
+examples:
+  - |
+    clock-controller@ffd10000 {
+        compatible = "intel,stratix10-clkmgr";
+        reg = <0xffd10000 0x1000>;
+        #clock-cells = <1>;
+    };
-- 
2.32.0


  parent reply	other threads:[~2021-12-27 13:36 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-27 13:31 [PATCH 00/19] arm/arm64/dt-bindings: altera/intel: fix DTS and dtschema Krzysztof Kozlowski
2021-12-27 13:31 ` [PATCH 01/19] dt-bindings: vendor-prefixes: add Enclustra Krzysztof Kozlowski
2021-12-27 13:31 ` [PATCH 02/19] dt-bindings: altera: document existing Cyclone 5 board compatibles Krzysztof Kozlowski
2021-12-27 13:31 ` [PATCH 03/19] dt-bindings: altera: document Arria 5 based " Krzysztof Kozlowski
2021-12-27 13:31 ` [PATCH 04/19] dt-bindings: altera: document Arria 10 " Krzysztof Kozlowski
2021-12-27 13:31 ` [PATCH 05/19] dt-bindings: altera: document VT compatibles Krzysztof Kozlowski
2021-12-27 13:35 ` [PATCH 06/19] dt-bindings: altera: document Stratix 10 based board compatibles Krzysztof Kozlowski
2021-12-27 13:35 ` [PATCH 07/19] dt-bindings: intel: document Agilex " Krzysztof Kozlowski
2021-12-27 13:35 ` Krzysztof Kozlowski [this message]
2022-01-06  0:34   ` [PATCH 08/19] dt-bindings: clock: intel,stratix10: convert to dtschema Stephen Boyd
2021-12-27 13:35 ` [PATCH 09/19] dt-bindings: mmc: synopsys-dw-mshc: integrate Altera and Imagination Krzysztof Kozlowski
2021-12-28 16:58   ` Ulf Hansson
2021-12-27 13:35 ` [PATCH 10/19] ARM: dts: arria5: add board compatible for SoCFPGA DK Krzysztof Kozlowski
2021-12-27 13:35 ` [PATCH 11/19] ARM: dts: arria10: add board compatible for Mercury AA1 Krzysztof Kozlowski
2021-12-27 13:35 ` [PATCH 12/19] ARM: dts: arria10: add board compatible for SoCFPGA DK Krzysztof Kozlowski
2021-12-27 13:35 ` [PATCH 13/19] arm64: dts: stratix10: " Krzysztof Kozlowski
2021-12-27 13:35 ` [PATCH 14/19] arm64: dts: stratix10: move ARM timer out of SoC node Krzysztof Kozlowski
2021-12-27 13:35 ` [PATCH 15/19] arm64: dts: stratix10: align mmc node names with dtschema Krzysztof Kozlowski
2021-12-27 13:35 ` [PATCH 16/19] arm64: dts: stratix10: align regulator " Krzysztof Kozlowski
2021-12-27 13:35 ` [PATCH 17/19] arm64: dts: agilex: add board compatible for SoCFPGA DK Krzysztof Kozlowski
2021-12-27 13:35 ` [PATCH 18/19] arm64: dts: agilex: add board compatible for N5X DK Krzysztof Kozlowski
2021-12-27 13:35 ` [PATCH 19/19] arm64: dts: agilex: align mmc node names with dtschema Krzysztof Kozlowski
2022-01-03 16:06 ` [PATCH 00/19] arm/arm64/dt-bindings: altera/intel: fix DTS and dtschema Dinh Nguyen

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