From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6C77FC433F5 for ; Thu, 26 May 2022 02:43:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235610AbiEZCnd (ORCPT ); Wed, 25 May 2022 22:43:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58154 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230437AbiEZCnc (ORCPT ); Wed, 25 May 2022 22:43:32 -0400 Received: from alexa-out-sd-02.qualcomm.com (alexa-out-sd-02.qualcomm.com [199.106.114.39]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8EE99A0D3F; Wed, 25 May 2022 19:43:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1653533011; x=1685069011; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=MkXvGOkgsRkE9xAqBH8MxOEi/pGpCOB31sbZlYpOA7s=; b=DSp9yFIdvwOtsiM7V+YPqUvq5a81Nz5piBDRG4TcJyTmBGYjYKkIsZj4 FFRYn0acVaul3PrkH1DNtCAlmJXNXWy5GYgRloVLYlVOLy9Uhima0cZ// Kdvus5t2dm+lv7hM00pYE2VOUNmVE1znEWXs0Ru8EK3XPUkB0E8HpjIe/ I=; Received: from unknown (HELO ironmsg03-sd.qualcomm.com) ([10.53.140.143]) by alexa-out-sd-02.qualcomm.com with ESMTP; 25 May 2022 19:43:31 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg03-sd.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 May 2022 19:43:30 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Wed, 25 May 2022 19:43:30 -0700 Received: from hu-pkondeti-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Wed, 25 May 2022 19:43:23 -0700 Date: Thu, 26 May 2022 08:13:19 +0530 From: Pavan Kondeti To: Krishna Kurapati CC: Krzysztof Kozlowski , Rob Herring , Andy Gross , Bjorn Andersson , Greg Kroah-Hartman , Felipe Balbi , Stephen Boyd , Doug Anderson , "Matthias Kaehlcke" , Mathias Nyman , , , , , , , , , Sandeep Maheswaram Subject: Re: [PATCH v18 2/5] usb: dwc3: core: Host wake up support from system suspend Message-ID: <20220526024319.GN15121@hu-pkondeti-hyd.qualcomm.com> References: <1653502826-24256-1-git-send-email-quic_kriskura@quicinc.com> <1653502826-24256-3-git-send-email-quic_kriskura@quicinc.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <1653502826-24256-3-git-send-email-quic_kriskura@quicinc.com> User-Agent: Mutt/1.5.24 (2015-08-30) X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Wed, May 25, 2022 at 11:50:23PM +0530, Krishna Kurapati wrote: > From: Sandeep Maheswaram > > Check wakeup-source property for dwc3 core node to set the > wakeup capability. Drop the device_init_wakeup call from > runtime suspend and resume. > > If the dwc3 is wakeup capable, don't power down the USB PHY(s). > The glue drivers are expected to take care of configuring the > additional wakeup settings if needed based on the dwc3 wakeup > capability status. In some SOC designs, powering off the PHY is > resulting in higher leakage, so this patch save power on such boards. > > Signed-off-by: Sandeep Maheswaram > Signed-off-by: Krishna Kurapati > Reviewed-by: Pavankumar Kondeti > Reviewed-by: Matthias Kaehlcke > --- > drivers/usb/dwc3/core.c | 26 ++++++++++++-------------- > 1 file changed, 12 insertions(+), 14 deletions(-) > > diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c > index e027c04..2b1b3f7 100644 > --- a/drivers/usb/dwc3/core.c > +++ b/drivers/usb/dwc3/core.c > @@ -1787,6 +1787,7 @@ static int dwc3_probe(struct platform_device *pdev) > > platform_set_drvdata(pdev, dwc); > dwc3_cache_hwparams(dwc); > + device_init_wakeup(&pdev->dev, of_property_read_bool(dev->of_node, "wakeup-source")); > > spin_lock_init(&dwc->lock); > mutex_init(&dwc->mutex); > @@ -1948,11 +1949,6 @@ static int dwc3_suspend_common(struct dwc3 *dwc, pm_message_t msg) > dwc3_core_exit(dwc); > break; > case DWC3_GCTL_PRTCAP_HOST: > - if (!PMSG_IS_AUTO(msg)) { > - dwc3_core_exit(dwc); > - break; > - } > - > /* Let controller to suspend HSPHY before PHY driver suspends */ > if (dwc->dis_u2_susphy_quirk || > dwc->dis_enblslpm_quirk) { > @@ -1967,6 +1963,11 @@ static int dwc3_suspend_common(struct dwc3 *dwc, pm_message_t msg) > > phy_pm_runtime_put_sync(dwc->usb2_generic_phy); > phy_pm_runtime_put_sync(dwc->usb3_generic_phy); > + > + if (!PMSG_IS_AUTO(msg)) { > + if (!device_can_wakeup(dwc->dev)) > + dwc3_core_exit(dwc); > + } > break; Earlier, the dwc3 which does not support wakeup just calls dwc3_core_exit(). With this patch we are modifying the behavior. Is that intentional? I expect it to be something like @@ -1761,8 +1782,10 @@ static int dwc3_suspend_common(struct dwc3 *dwc, pm_message_t msg) break; case DWC3_GCTL_PRTCAP_HOST: if (!PMSG_IS_AUTO(msg)) { - dwc3_core_exit(dwc); - break; + if (!device_can_wakeup(dwc->dev)) { + dwc3_core_exit(dwc); + break; + } } /* Let controller to suspend HSPHY before PHY driver suspends */ Thanks, Pavan