From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 40D03C433EF for ; Fri, 27 May 2022 11:00:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1351137AbiE0LAx (ORCPT ); Fri, 27 May 2022 07:00:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58440 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350414AbiE0LAu (ORCPT ); Fri, 27 May 2022 07:00:50 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E4A6612E312; Fri, 27 May 2022 04:00:45 -0700 (PDT) X-UUID: e89884477f564b6abae5384d5c00b662-20220527 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.5,REQID:09582b69-8c3b-4dce-9e74-524b0c1fc3b5,OB:0,LO B:0,IP:0,URL:0,TC:0,Content:0,EDM:0,RT:0,SF:100,FILE:0,RULE:Release_Ham,AC TION:release,TS:100 X-CID-INFO: VERSION:1.1.5,REQID:09582b69-8c3b-4dce-9e74-524b0c1fc3b5,OB:0,LOB: 0,IP:0,URL:0,TC:0,Content:0,EDM:0,RT:0,SF:100,FILE:0,RULE:Spam_GS981B3D,AC TION:quarantine,TS:100 X-CID-META: VersionHash:2a19b09,CLOUDID:c8747fb8-3c45-407b-8f66-25095432a27a,C OID:238c0bece6fb,Recheck:0,SF:28|17|19|48,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,QS:0,BEC:nil X-UUID: e89884477f564b6abae5384d5c00b662-20220527 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 751117326; Fri, 27 May 2022 19:00:39 +0800 Received: from mtkmbs07n1.mediatek.inc (172.21.101.16) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.15; Fri, 27 May 2022 19:00:38 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 27 May 2022 19:00:38 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 27 May 2022 19:00:38 +0800 From: Johnson Wang To: , , , CC: , , , , , , , , Johnson Wang Subject: [PATCH v6 0/2] Introduce MediaTek CCI devfreq driver Date: Fri, 27 May 2022 19:00:34 +0800 Message-ID: <20220527110036.8810-1-johnson.wang@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The Cache Coherent Interconnect (CCI) is the management of cache coherency by hardware. CCI DEVFREQ is DVFS driver for power saving by scaling clock frequency and supply voltage of CCI. CCI uses the same input clock source and power rail as LITTLE CPUs on Mediatek SoCs. This series depends on: Chanwoo's repo: kernel/git/chanwoo/linux.git branch: devfreq-testing [1]: PM / devfreq: Export devfreq_get_freq_range symbol within devfreq [2]: PM / devfreq: Add cpu based scaling support to passive governor [3]: PM / devfreq: passive: Reduce duplicate code when passive_devfreq case [4]: PM / devfreq: passive: Update frequency when start governor Changes in v6: - Remove unnecessary "goto" statement. Changes in v5: - Modify some binding description. - Remove pre_voltage member. - Not to enable/disable intermediate clock. - Not to "put" resources that using devm_ variants. Resend v4: - CC interconnect maintainer. - Change sign-off sequence in commit message. Changes in v4: - Add a maintainer in the binding document. - Modify clock description. - Add binding document into MAINTAINERS. - Replace format specifier %d with %ld. Changes in v3: - Move binding document to 'interconnect' and rename it. - Add COMPILE_TEST dependence symbol. - Remove need_voltage_tracking variable. - Move mtk_ccifreq_voltage_tracking() code into mtk_ccifreq_set_voltage(). - Add an interation limit in the while() loop. - Replace 'cci_dev' with 'dev' - Replace old_* with pre_* - Remove of_match_ptr() - Use module_platform_driver() Changes in v2: - Take MT8183 as example in binding document. - Use dev_err() instead of pr_err(). - Use 'goto' statement to handle error case. - Clean up driver code. Johnson Wang (2): dt-bindings: interconnect: Add MediaTek CCI dt-bindings PM / devfreq: mediatek: Introduce MediaTek CCI devfreq driver .../bindings/interconnect/mediatek,cci.yaml | 140 ++++++ MAINTAINERS | 1 + drivers/devfreq/Kconfig | 10 + drivers/devfreq/Makefile | 1 + drivers/devfreq/mtk-cci-devfreq.c | 474 ++++++++++++++++++ 5 files changed, 626 insertions(+) create mode 100644 Documentation/devicetree/bindings/interconnect/mediatek,cci.yaml create mode 100644 drivers/devfreq/mtk-cci-devfreq.c -- 2.18.0