From: "Jernej Škrabec" <jernej.skrabec-gGgVlfcn5nU@public.gmane.org>
To: "Uwe Kleine-König"
<u.kleine-koenig-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
Cc: thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
mripard-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
wens-jdAy2FN1RRM@public.gmane.org,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
mark.rutland-5wv7dgnIgG8@public.gmane.org,
linux-pwm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org
Subject: Re: [PATCH 5/6] pwm: sun4i: Add support to output source clock directly
Date: Mon, 29 Jul 2019 18:16:55 +0200 [thread overview]
Message-ID: <2499807.IN78SsLMYo@jernej-laptop> (raw)
In-Reply-To: <20190729070605.vlu7kgzn362ph2q3-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
Hi Uwe,
Dne ponedeljek, 29. julij 2019 ob 09:06:05 CEST je Uwe Kleine-König
napisal(a):
> On Fri, Jul 26, 2019 at 08:40:44PM +0200, Jernej Skrabec wrote:
> > PWM core has an option to bypass whole logic and output unchanged source
> > clock as PWM output. This is achieved by enabling bypass bit.
> >
> > Note that when bypass is enabled, no other setting has any meaning, not
> > even enable bit.
> >
> > This mode of operation is needed to achieve high enough frequency to
> > serve as clock source for AC200 chip, which is integrated into same
> > package as H6 SoC.
> >
> > Signed-off-by: Jernej Skrabec <jernej.skrabec-gGgVlfcn5nU@public.gmane.org>
> > ---
> >
> > drivers/pwm/pwm-sun4i.c | 31 ++++++++++++++++++++++++++++++-
> > 1 file changed, 30 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/pwm/pwm-sun4i.c b/drivers/pwm/pwm-sun4i.c
> > index 9e0eca79ff88..848cff26f385 100644
> > --- a/drivers/pwm/pwm-sun4i.c
> > +++ b/drivers/pwm/pwm-sun4i.c
> > @@ -120,6 +120,19 @@ static void sun4i_pwm_get_state(struct pwm_chip
> > *chip,
> >
> > val = sun4i_pwm_readl(sun4i_pwm, PWM_CTRL_REG);
> >
> > + /*
> > + * PWM chapter in H6 manual has a diagram which explains that if
bypass
> > + * bit is set, no other setting has any meaning. Even more,
experiment
> > + * proved that also enable bit is ignored in this case.
> > + */
> > + if (val & BIT_CH(PWM_BYPASS, pwm->hwpwm)) {
> > + state->period = DIV_ROUND_CLOSEST_ULL(NSEC_PER_SEC,
clk_rate);
> > + state->duty_cycle = state->period / 2;
> > + state->polarity = PWM_POLARITY_NORMAL;
> > + state->enabled = true;
> > + return;
> > + }
> > +
> >
> > if ((PWM_REG_PRESCAL(val, pwm->hwpwm) == PWM_PRESCAL_MASK) &&
> >
> > sun4i_pwm->data->has_prescaler_bypass)
> >
> > prescaler = 1;
> >
> > @@ -211,7 +224,8 @@ static int sun4i_pwm_apply(struct pwm_chip *chip,
> > struct pwm_device *pwm,>
> > {
> >
> > struct sun4i_pwm_chip *sun4i_pwm = to_sun4i_pwm_chip(chip);
> > struct pwm_state cstate;
> >
> > - u32 ctrl;
> > + u32 ctrl, clk_rate;
> > + bool bypass;
> >
> > int ret;
> > unsigned int delay_us;
> > unsigned long now;
> >
> > @@ -226,6 +240,16 @@ static int sun4i_pwm_apply(struct pwm_chip *chip,
> > struct pwm_device *pwm,>
> > }
> >
> > }
> >
> > + /*
> > + * Although it would make much more sense to check for bypass in
> > + * sun4i_pwm_calculate(), value of bypass bit also depends on
"enabled".
> > + * Period is allowed to be rounded up or down.
> > + */
>
> Every driver seems to implement rounding the way its driver considers it
> sensible. @Thierry: This is another patch where it would be good to have
> a global directive about how rounding is supposed to work to provide the
> users an reliable and uniform way to work with PWMs.
>
> > + clk_rate = clk_get_rate(sun4i_pwm->clk);
> > + bypass = (state->period == NSEC_PER_SEC / clk_rate ||
> > + state->period == DIV_ROUND_UP(NSEC_PER_SEC, clk_rate))
&&
> > + state->enabled;
>
> Not sure if the compiler is clever enough to notice the obvious
> optimisation with this code construct, but you can write this test in a
> more clever way which has zero instead of up to two divisions. Something
> like:
>
> bypass = ((state->period * clk_rate >= NSEC_PER_SEC &&
> state->period * clk_rate < NSEC_PER_SEC + clk_rate) &&
> state->enabled);
>
> In the commit log you write the motivation for using bypass is that it
> allows to implement higher frequency then with the "normal" operation.
> As you don't skip calculating the normal parameters requesting such a
> high-frequency setting either errors out or doesn't catch the impossible
> request. In both cases there is something to fix.
It's the latter, otherwise it wouldn't work for my case. I'll fix the check and
skip additional logic.
>
> > +
> >
> > spin_lock(&sun4i_pwm->ctrl_lock);
> > ctrl = sun4i_pwm_readl(sun4i_pwm, PWM_CTRL_REG);
> >
> > @@ -273,6 +297,11 @@ static int sun4i_pwm_apply(struct pwm_chip *chip,
> > struct pwm_device *pwm,>
> > ctrl &= ~BIT_CH(PWM_CLK_GATING, pwm->hwpwm);
> >
> > }
> >
> > + if (bypass)
> > + ctrl |= BIT_CH(PWM_BYPASS, pwm->hwpwm);
> > + else
> > + ctrl &= ~BIT_CH(PWM_BYPASS, pwm->hwpwm);
> > +
>
> Does switching on (or off) the bypass bit complete the currently running
> period?
I don't really know. If I understand correctly, it just bypasses PWM logic
completely, so I would say it doesn't complete the currently running period.
Take a look at chapter 3.9.2 http://linux-sunxi.org/
File:Allwinner_H6_V200_User_Manual_V1.1.pdf
Best regards,
Jernej
>
> > sun4i_pwm_writel(sun4i_pwm, ctrl, PWM_CTRL_REG);
> >
> > spin_unlock(&sun4i_pwm->ctrl_lock);
>
> Best regards
> Uwe
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next prev parent reply other threads:[~2019-07-29 16:16 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-26 18:40 [PATCH 0/6] pwm: sun4i: Add support for Allwinner H6 Jernej Skrabec
2019-07-26 18:40 ` [PATCH 1/6] dt-bindings: pwm: allwinner: Add H6 PWM description Jernej Skrabec
2019-07-27 10:42 ` Maxime Ripard
[not found] ` <20190726184045.14669-1-jernej.skrabec-gGgVlfcn5nU@public.gmane.org>
2019-07-26 18:40 ` [PATCH 2/6] pwm: sun4i: Add a quirk for reset line Jernej Skrabec
2019-07-27 10:42 ` Maxime Ripard
[not found] ` <20190726184045.14669-3-jernej.skrabec-gGgVlfcn5nU@public.gmane.org>
2019-07-29 6:36 ` Uwe Kleine-König
[not found] ` <20190729063630.rn325whatfnc3m7n-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2019-07-29 6:43 ` Chen-Yu Tsai
[not found] ` <CAGb2v65KOpivHQNkg+R2=D=ejCJYnPdVcyHJZW-GJCR8j0Yk0g-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2019-07-29 7:12 ` Uwe Kleine-König
2019-07-29 10:18 ` Philipp Zabel
2019-07-29 16:37 ` Maxime Ripard
[not found] ` <20190729163715.vtv7lkrywewomxga-YififvaboMKzQB+pC5nmwQ@public.gmane.org>
2019-07-29 18:20 ` Uwe Kleine-König
2019-07-26 18:40 ` [PATCH 3/6] pwm: sun4i: Add a quirk for bus clock Jernej Skrabec
2019-07-27 10:46 ` Maxime Ripard
[not found] ` <20190727104628.jsdvpxvcpzru75v5-YififvaboMKzQB+pC5nmwQ@public.gmane.org>
2019-07-27 14:15 ` Jernej Škrabec
2019-07-27 14:27 ` Chen-Yu Tsai
2019-07-29 6:38 ` Uwe Kleine-König
[not found] ` <20190729063825.wxfky6nswcru26g7-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2019-07-29 15:48 ` Jernej Škrabec
2019-07-29 16:14 ` Uwe Kleine-König
2019-07-29 16:45 ` Maxime Ripard
[not found] ` <20190729164516.yxfgj2zd3d5ii4c4-YififvaboMKzQB+pC5nmwQ@public.gmane.org>
2019-07-29 19:04 ` Uwe Kleine-König
2019-07-26 18:40 ` [PATCH 4/6] pwm: sun4i: Add support for H6 PWM Jernej Skrabec
[not found] ` <20190726184045.14669-5-jernej.skrabec-gGgVlfcn5nU@public.gmane.org>
2019-07-29 6:40 ` Uwe Kleine-König
[not found] ` <20190729064030.7uenld2kbof45zti-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2019-07-29 15:55 ` Jernej Škrabec
2019-07-29 16:07 ` Uwe Kleine-König
2019-07-29 16:09 ` [linux-sunxi] " Chen-Yu Tsai
[not found] ` <CAGb2v66C=ghjck6rxTg6Vt4xN2DcXntzVOa=KJWh98KRjkhnHQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2019-07-29 16:24 ` Uwe Kleine-König
[not found] ` <20190729162428.bxuzgxg5sjqptlbp-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2019-07-29 16:40 ` Jernej Škrabec
2019-07-29 18:40 ` Uwe Kleine-König
[not found] ` <20190729184041.vlvfz3vz3ykhufdk-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2019-07-29 18:46 ` Jernej Škrabec
2019-07-29 18:51 ` Uwe Kleine-König
[not found] ` <20190729185108.tpilwoooxvi2z72e-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2019-07-29 22:04 ` Jernej Škrabec
2019-07-30 8:09 ` Uwe Kleine-König
[not found] ` <20190730080900.hhxrqun7vk4nsj2h-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2019-07-30 8:32 ` Chen-Yu Tsai
2019-07-30 17:06 ` [linux-sunxi] " Maxime Ripard
2019-07-31 6:52 ` Uwe Kleine-König
2019-08-12 9:56 ` [linux-sunxi] " Maxime Ripard
2019-08-12 10:47 ` Uwe Kleine-König
[not found] ` <20190812104700.vzpdxx3yddthiif5-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2019-08-12 10:51 ` Jernej Škrabec
2019-07-26 18:40 ` [PATCH 5/6] pwm: sun4i: Add support to output source clock directly Jernej Skrabec
2019-07-27 10:50 ` Maxime Ripard
[not found] ` <20190727105008.he35sixfvoyl2lm7-YififvaboMKzQB+pC5nmwQ@public.gmane.org>
2019-07-27 14:28 ` Jernej Škrabec
2019-07-27 14:54 ` Chen-Yu Tsai
[not found] ` <20190726184045.14669-6-jernej.skrabec-gGgVlfcn5nU@public.gmane.org>
2019-07-29 7:06 ` Uwe Kleine-König
[not found] ` <20190729070605.vlu7kgzn362ph2q3-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2019-07-29 16:16 ` Jernej Škrabec [this message]
2019-07-29 16:29 ` Uwe Kleine-König
2019-07-26 18:40 ` [PATCH 6/6] arm64: dts: allwinner: h6: Add PWM node Jernej Skrabec
2019-07-27 10:51 ` Maxime Ripard
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