From mboxrd@z Thu Jan 1 00:00:00 1970 From: Matthias Brugger Subject: Re: [PATCH v5 08/12] dt-bindings: mediatek: Change the binding for mmsys clocks Date: Sun, 18 Nov 2018 18:12:15 +0100 Message-ID: <2a23e407-4cd4-2e2b-97a5-4e2bb96846e0@gmail.com> References: <20181116125449.23581-1-matthias.bgg@kernel.org> <20181116125449.23581-9-matthias.bgg@kernel.org> <20181116231522.GA18006@bogus> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="------------DE07BBB8F39CF4FD41CA126C" Return-path: In-Reply-To: <20181116231522.GA18006@bogus> Content-Language: en-US Sender: linux-kernel-owner@vger.kernel.org To: Rob Herring , matthias.bgg@kernel.org Cc: mark.rutland@arm.com, ck.hu@mediatek.com, p.zabel@pengutronix.de, airlied@linux.ie, mturquette@baylibre.com, sboyd@codeaurora.org, ulrich.hecht+renesas@gmail.com, laurent.pinchart@ideasonboard.com, sean.wang@mediatek.com, sean.wang@kernel.org, rdunlap@infradead.org, wens@csie.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, Matthias Brugger List-Id: devicetree@vger.kernel.org This is a multi-part message in MIME format. --------------DE07BBB8F39CF4FD41CA126C Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On 11/17/18 12:15 AM, Rob Herring wrote: > On Fri, Nov 16, 2018 at 01:54:45PM +0100, matthias.bgg@kernel.org wrote= : >> From: Matthias Brugger >> >> On SoCs with no publical available HW or no working graphic stack >> we change the devicetree binding for the mmsys clock part. This >> way we don't need to register a platform device explicitly in the >> drm driver. Instead we can create a mmsys child which invokes the >> clock driver. >> >> Signed-off-by: Matthias Brugger >> --- >> .../bindings/arm/mediatek/mediatek,mmsys.txt | 21 ++++++++++++------= - >> .../display/mediatek/mediatek,disp.txt | 4 ++++ >> 2 files changed, 18 insertions(+), 7 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,m= msys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.= txt >> index 4468345f8b1a..d4e205981363 100644 >> --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.tx= t >> +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.tx= t >> @@ -1,4 +1,4 @@ >> -Mediatek mmsys controller >> +Mediatek mmsys clock controller >> =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D >> =20 >> The Mediatek mmsys controller provides various clocks to the system. >> @@ -6,18 +6,25 @@ The Mediatek mmsys controller provides various clock= s to the system. >> Required Properties: >> =20 >> - compatible: Should be one of: >> - - "mediatek,mt2712-mmsys", "syscon" >> - - "mediatek,mt6797-mmsys", "syscon" >> + - "mediatek,mt2712-mmsys-clk", "syscon" >> + - "mediatek,mt6797-mmsys-clk", "syscon" >=20 > Doesn't match the example.> >> - #clock-cells: Must be 1 >> =20 >> -The mmsys controller uses the common clk binding from >> +The mmsys clock controller uses the common clk binding from >> Documentation/devicetree/bindings/clock/clock-bindings.txt >> The available clocks are defined in dt-bindings/clock/mt*-clk.h. >> +It is a child of the mmsys block, see binding at: >> +Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt >> =20 >> Example: >> =20 >> -mmsys: clock-controller@14000000 { >> - compatible =3D "mediatek,mt8173-mmsys", "syscon"; >> +mmsys: syscon@14000000 { >> + compatible =3D "mediatek,mt2712-mmsys", "syscon", "simple-mfd"; >> reg =3D <0 0x14000000 0 0x1000>; >> - #clock-cells =3D <1>; >> + >> + mmsys_clk: clock-controller@14000000 { >> + compatible =3D "mediatek,mt2712-mmsys-clk"; >> + #clock-cells =3D <1>; >=20 > This goes against the general direction of not defining separate nodes = > for providers with no resources. >=20 > Why do you need this and what does it buy if you have to continue to=20 > support the existing chips? >=20 It would show explicitly that the mmsys block is used to probe two drivers, one for the gpu and one for the clocks. Otherwise that is hidden in the drm driver code. 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