From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 56FFFC433F5 for ; Mon, 30 May 2022 07:51:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233979AbiE3HvM (ORCPT ); Mon, 30 May 2022 03:51:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59930 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234051AbiE3Hua (ORCPT ); Mon, 30 May 2022 03:50:30 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 43B096300; Mon, 30 May 2022 00:50:28 -0700 (PDT) X-UUID: c0e55e53b2994df78afd0a8347674eaf-20220530 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.5,REQID:fcd94474-4a89-4cd6-8c90-41c62bcbb644,OB:0,LO B:0,IP:0,URL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,RULE:Release_Ham,ACTI ON:release,TS:0 X-CID-META: VersionHash:2a19b09,CLOUDID:b113c0b8-3c45-407b-8f66-25095432a27a,C OID:IGNORED,Recheck:0,SF:nil,TC:nil,Content:0,EDM:-3,IP:nil,URL:1,File:nil ,QS:0,BEC:nil X-UUID: c0e55e53b2994df78afd0a8347674eaf-20220530 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1881320135; Mon, 30 May 2022 15:50:24 +0800 Received: from mtkmbs07n1.mediatek.inc (172.21.101.16) by mtkmbs11n2.mediatek.inc (172.21.101.187) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Mon, 30 May 2022 15:50:23 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 30 May 2022 15:50:23 +0800 Received: from mtksdccf07 (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 30 May 2022 15:50:22 +0800 Message-ID: <2c88fd4c308e86536d5996b3f32f68d05d452e23.camel@mediatek.com> Subject: Re: [PATCH v10 08/21] drm/mediatek: dpi: implement a swap_input toggle in SoC config From: CK Hu To: Guillaume Ranquet , Chun-Kuang Hu , Philipp Zabel , "David Airlie" , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Matthias Brugger , Chunfeng Yun , "Kishon Vijay Abraham I" , Vinod Koul , "Helge Deller" , Jitao shi CC: AngeloGioacchino Del Regno , Rex-BC Chen , , , , , , , Date: Mon, 30 May 2022 15:50:23 +0800 In-Reply-To: <20220523104758.29531-9-granquet@baylibre.com> References: <20220523104758.29531-1-granquet@baylibre.com> <20220523104758.29531-9-granquet@baylibre.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-MTK: N Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hi, Guillaume: On Mon, 2022-05-23 at 12:47 +0200, Guillaume Ranquet wrote: > Adds a bit of flexibility to support SoCs without swap_input support > > Signed-off-by: Guillaume Ranquet > Reviewed-by: AngeloGioacchino Del Regno < > angelogioacchino.delregno@collabora.com> > Reviewed-by: Rex-BC Chen > --- > drivers/gpu/drm/mediatek/mtk_dpi.c | 14 +++++++++++--- > 1 file changed, 11 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c > b/drivers/gpu/drm/mediatek/mtk_dpi.c > index 545a1337cc89..454f8563efae 100644 > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c > @@ -126,6 +126,7 @@ struct mtk_dpi_conf { > const u32 *output_fmts; > u32 num_output_fmts; > bool is_ck_de_pol; > + bool swap_input_support; > const struct mtk_dpi_yc_limit *limit; > }; > > @@ -378,18 +379,21 @@ static void mtk_dpi_config_color_format(struct > mtk_dpi *dpi, > (format == MTK_DPI_COLOR_FORMAT_YCBCR_444_FULL)) { > mtk_dpi_config_yuv422_enable(dpi, false); > mtk_dpi_config_csc_enable(dpi, true); > - mtk_dpi_config_swap_input(dpi, false); > + if (dpi->conf->swap_input_support) > + mtk_dpi_config_swap_input(dpi, false); > mtk_dpi_config_channel_swap(dpi, > MTK_DPI_OUT_CHANNEL_SWAP_BGR); > } else if ((format == MTK_DPI_COLOR_FORMAT_YCBCR_422) || > (format == MTK_DPI_COLOR_FORMAT_YCBCR_422_FULL)) { > mtk_dpi_config_yuv422_enable(dpi, true); > mtk_dpi_config_csc_enable(dpi, true); > - mtk_dpi_config_swap_input(dpi, true); > + if (dpi->conf->swap_input_support) > + mtk_dpi_config_swap_input(dpi, true); As [1], please keep in touch with Mediatek engineer. Regards, CK [1] https://patchwork.kernel.org/project/linux-mediatek/patch/20220218145437.18563-8-granquet@baylibre.com/ > mtk_dpi_config_channel_swap(dpi, > MTK_DPI_OUT_CHANNEL_SWAP_RGB); > } else { > mtk_dpi_config_yuv422_enable(dpi, false); > mtk_dpi_config_csc_enable(dpi, false); > - mtk_dpi_config_swap_input(dpi, false); > + if (dpi->conf->swap_input_support) > + mtk_dpi_config_swap_input(dpi, false); > mtk_dpi_config_channel_swap(dpi, > MTK_DPI_OUT_CHANNEL_SWAP_RGB); > } > } > @@ -808,6 +812,7 @@ static const struct mtk_dpi_conf mt8173_conf = { > .output_fmts = mt8173_output_fmts, > .num_output_fmts = ARRAY_SIZE(mt8173_output_fmts), > .is_ck_de_pol = true, > + .swap_input_support = true, > .limit = &mtk_dpi_limit, > }; > > @@ -819,6 +824,7 @@ static const struct mtk_dpi_conf mt2701_conf = { > .output_fmts = mt8173_output_fmts, > .num_output_fmts = ARRAY_SIZE(mt8173_output_fmts), > .is_ck_de_pol = true, > + .swap_input_support = true, > .limit = &mtk_dpi_limit, > }; > > @@ -829,6 +835,7 @@ static const struct mtk_dpi_conf mt8183_conf = { > .output_fmts = mt8183_output_fmts, > .num_output_fmts = ARRAY_SIZE(mt8183_output_fmts), > .is_ck_de_pol = true, > + .swap_input_support = true, > .limit = &mtk_dpi_limit, > }; > > @@ -839,6 +846,7 @@ static const struct mtk_dpi_conf mt8192_conf = { > .output_fmts = mt8173_output_fmts, > .num_output_fmts = ARRAY_SIZE(mt8173_output_fmts), > .is_ck_de_pol = true, > + .swap_input_support = true, > .limit = &mtk_dpi_limit, > }; >