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Wed, 14 Jul 2021 09:19:37 +0000 Subject: Re: [PATCH v2 1/2] dt-bindings: display: rockchip: Add compatible for rk3568 HDMI To: =?UTF-8?Q?Heiko_St=c3=bcbner?= , Benjamin Gaignard , hjc@rock-chips.com, airlied@linux.ie, daniel@ffwll.ch, robh+dt@kernel.org, algea.cao@rock-chips.com, andy.yan@rock-chips.com Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@collabora.com References: <20210707120323.401785-1-benjamin.gaignard@collabora.com> <20210707120323.401785-2-benjamin.gaignard@collabora.com> <1bd64284-0a20-12e3-e2e7-19cdfdbf1a25@wolfvision.net> <3865833.Ac65pObt5d@diego> From: Michael Riesch Organization: WolfVision GmbH Message-ID: <33532a38-52e6-179a-9ed9-76bbb9618168@wolfvision.net> Date: Wed, 14 Jul 2021 11:19:35 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.9.0 In-Reply-To: <3865833.Ac65pObt5d@diego> Content-Type: text/plain; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?OXEwSW1TNGhUTVFYSklqcTg4bmlPYldkaGpHeUdKbTU0UzM5NEI5aGNoMFla?= =?utf-8?B?U2lXRDNCbXUzOXpwNVBBVmhWeTdocHFxaldNNmorKzh2Q2k2T1JVSE5kbGEw?= =?utf-8?B?MVIyY2lZZDJGY09kNitieVNSMndnTmtCcTdFT0JqUWs1OXRIazlPdVZxKzE2?= =?utf-8?B?azFsSUQ2SWNaK2JNWG1SeTRiQ2E4eUZlZjZjN0RtY0d1OVJoTVdvSGZVQ01H?= =?utf-8?B?MVFTY1VwWkZmb2lHSjlzKy9qc2t3K09ITWs3VVp5NURLL05nQjB5TjdJME5N?= =?utf-8?B?YmtFOUpqaTdXNzdZejQzU0x3dm43eDFjYXRXMmpBSkNaalBCMUJQamJFZnly?= =?utf-8?B?Mmp1eWhPRytQRG9CODV6UGpUTFp0eG83eFBBNU5FQ1JuUGJJaEk3RW9LcVBp?= =?utf-8?B?RkRhYmpxd3NUd0xIMEdkSFN6cDY5M3cvbTArSjEzajFuclkxL3oxa3l3dzBB?= =?utf-8?B?YzhQQzNjdEdxYUd2ZjFPU0s2VFgxM2hMbWxGbVdxdmVGYnVkVE80ZjRORlFz?= =?utf-8?B?SXFiZXhkWWRlMHFLMjR1bUVseDRuNXZobGdoU05GZDZBbEwyRTZXNE9ZNW1s?= =?utf-8?B?clplbGdiZVVWeXRIeFMwUnR5cGtBUVhsbzNPbVBSbWVIUHRMaG1xTDNRcGxn?= =?utf-8?B?YWRBSGpCTDkxRVIvS3NSNWk5elVhallKTFdrek1pWEs3NklyY0l5dDZpZjNX?= =?utf-8?B?QWVQUnYzckFiNHFReDhIYkVVa24zdTRtMENlSlZwNmdsS0NKdE13RG9LdElS?= =?utf-8?B?aGgzN2hKQnpKWFdNNmpNdGJHUFlpR04rVndZM0x5ZmJCVGFJajdFK2wvVE10?= =?utf-8?B?K2p0aUNrOTZiY0Iyanh0dkV2UE9hbitoTFloWnY5RGZCTnZhLzF5SHZEUi9M?= =?utf-8?B?VnlUZXBwdmIxWHFVWUp3RUFjUWFlTS9iUEI1K3BNZ0ZsbC8wOHJkK09sMjQy?= =?utf-8?B?YVBXMnNZVjFLbHRteUoyYzUydEZncStKUEluMDcyckV2Wnl6WFBORVdGTHBj?= =?utf-8?B?dFVsbVFXOGJnK2g5a0tLYXJobzRkZVJCbytHU1RqOU1BbGlST3F6UHRORDly?= =?utf-8?B?WDR2NkJCR0l3OGRTRWVXRFd3cUNLWCtvS0dhR3Q0Vm5wYm9FMFlUeThxa0JF?= =?utf-8?B?bjc0dXRqRU51ZXgxRTVicVdoZU85Vlk4WU5zdjdvOFZTMnBqWlI2VjZMdjNL?= =?utf-8?B?czdyejZYSVRsSVZBOXV2S2lwTjJFajVTekdtVkxOd3lMNHdpd29VTVc2QUhq?= =?utf-8?B?ZVhxMXJubFZERnd6dHJJaUgxK3RjL2VleFR3YlZpajhYU0hmL0hyUGYzNHl1?= =?utf-8?B?U0tGUi9oRGxrUHdwcmR6WXVoeGV2MjdqN2xuM0dya3dLUmxuL0pGVEUxbndO?= =?utf-8?B?M0FYdHp5aFVpK1UyRWNxR0I5SzJFU0VBZjNQY3pHUXlpRjYwMlI4SjE5d3VY?= =?utf-8?B?Z0hCSk9ieUdUR2xnak1rUEdOTlBmK2R4MElxTkxQbXkwOVloeGl5SHhsRURY?= =?utf-8?B?eUdZTUVaeUtpbUticjNrRzZGOFlWZEgxSTNQdFIvejhidCthd041aVZ5cEVL?= =?utf-8?B?bU8zblRLa2xxZ0ZEYnB5cFRWTWhsdCtaRGVzTmFRTWxnYWpuT003YlVsSjRG?= =?utf-8?B?ZHhKWmJRWllXc051dDE2OWtRajZOcjVTYkZHc1o1VG44RFp4RTlCUHBaZlBR?= =?utf-8?B?a3lRbjZuQUhGSXJCbTZ1SHBpODIyaG5Ta25Mc1VmT2VMdHQ1OWpFWDlBam5u?= =?utf-8?Q?FafsklQSJKoLVGlK5cYKrVxcfkVPP5fpl/324WZ?= X-OriginatorOrg: wolfvision.net X-MS-Exchange-CrossTenant-Network-Message-Id: c961f310-a969-4dce-b761-08d946a88088 X-MS-Exchange-CrossTenant-AuthSource: AM0PR08MB4516.eurprd08.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Jul 2021 09:19:37.5588 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: e94ec9da-9183-471e-83b3-51baa8eb804f X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 6jf55n0gRjyk0PTCuKIqAPmhdF0aTFfwaINjDoQSCKN+cUw1AsctfOjxCwLVpQ4x+3P/hXjMvxRQsrBq3c1aFWf6/lRBhjYC3DguyRMtBlM= X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM9PR08MB6803 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hello Heiko, On 7/13/21 10:49 AM, Heiko Stübner wrote: > Hi Michael, > > Am Dienstag, 13. Juli 2021, 10:44:00 CEST schrieb Michael Riesch: >> The HDMI TX block in the RK3568 requires two power supplies, which have >> to be enabled in some cases (at least on the RK3568 EVB1 the voltages >> VDDA0V9_IMAGE and VCCA1V8_IMAGE are disabled by default). It would be >> great if this was considered by the driver and the device tree binding. >> I am not sure, though, whether this is a RK3568 specific or >> rockchip_dw_hdmi specific thing. Maybe it can even enter the Synopsis DW >> HDMI driver. > > I do remember that this discussion happened many years back already. > And yes the supplies are needed for all but back then there was opposition > as these are supposedly phy-related supplies, not for the dw-hdmi itself. > [There are variants with an external phy, like on the rk3328] > > See discussion on [0] > > [0] https://dri-devel.freedesktop.narkive.com/pen2zWo1/patch-v3-1-2-drm-bridge-dw-hdmi-support-optional-supply-regulators Thanks for the pointer. My summary of this discussion would be the following: - There was no consensus on how to handle the issue. The voltages still have to be enabled from the outside of the driver. - Open question: rockchip-specific or general solution? (one may detect a tendency towards a rockchip-specific solution) - Open question: separation of the phy from the dw_hdmi IP core? First of all, IMHO the driver should enable those voltages, otherwise we will have the same discussion again in 5-6 years :-) Then, the rockchip,dw-hdmi binding features a property "phys", presumably to handle external phys (e.g., for the RK3328). This fact and the referenced discussion suggest a rockchip-specific solution. In the Rockchip documentation (at least for RK3328, RK3399 and RK3568), there are two extra voltages denoted as "HDMI PHY analog power". It would be tempting to add the internal phy to the device tree and glue it to the dw-hdmi using the "phys" property. However, as pointed out in the referenced discussion, the configuration registers of the phy are somewhat interleaved with the dw-hdmi registers and a clear separation may be tricky. As a more pragmatic alternative, we could add optional supplies to the rockchip,dw-hdmi binding and evaluate the "phys" property. If the latter is not specified, the internal phy is used and the supplies must be enabled. Would such an approach be acceptable? Best regards, Michael >> On 7/7/21 2:03 PM, Benjamin Gaignard wrote: >>> Define a new compatible for rk3568 HDMI. >>> This version of HDMI hardware block needs two new clocks hclk_vio and hclk >>> to provide phy reference clocks. >>> >>> Signed-off-by: Benjamin Gaignard >>> --- >>> version 2: >>> - Add the clocks needed for the phy. >>> >>> .../bindings/display/rockchip/rockchip,dw-hdmi.yaml | 6 +++++- >>> 1 file changed, 5 insertions(+), 1 deletion(-) >>> >>> diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml >>> index 75cd9c686e985..cb8643b3a8b84 100644 >>> --- a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml >>> +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml >>> @@ -23,6 +23,7 @@ properties: >>> - rockchip,rk3288-dw-hdmi >>> - rockchip,rk3328-dw-hdmi >>> - rockchip,rk3399-dw-hdmi >>> + - rockchip,rk3568-dw-hdmi >>> >>> reg-io-width: >>> const: 4 >>> @@ -51,8 +52,11 @@ properties: >>> - vpll >>> - enum: >>> - grf >>> + - hclk_vio >>> + - vpll >>> + - enum: >>> + - hclk >>> - vpll >>> - - const: vpll >> >> The description and documentation of the clocks are somewhat misleading >> IMHO. This is not caused by your patches, of course. But maybe this is a >> chance to clean them up a bit. >> >> It seems that the CEC clock is an optional clock of the dw-hdmi driver. >> Shouldn't it be documented in the synopsys,dw-hdmi.yaml? >> >> Also, it would be nice if the clocks hclk_vio and hclk featured a >> description in the binding. >> >> BTW, I am not too familiar with the syntax here, but shouldn't items in >> clocks and items in clock-names be aligned (currently, there is a plain >> list vs. an enum structure)? >> >> Best regards, >> Michael >> >>> >>> ddc-i2c-bus: >>> $ref: /schemas/types.yaml#/definitions/phandle >>> >> > > > >