From: "Andrew Jeffery" <andrew@aj.id.au>
To: "Arnd Bergmann" <arnd@arndb.de>, "Eddie James" <eajames@linux.ibm.com>
Cc: linux-aspeed <linux-aspeed@lists.ozlabs.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
DTML <devicetree@vger.kernel.org>,
"Mark Rutland" <mark.rutland@arm.com>,
"Jason Cooper" <jason@lakedaemon.net>,
"Marc Zyngier" <maz@kernel.org>,
"Rob Herring" <robh+dt@kernel.org>,
"Thomas Gleixner" <tglx@linutronix.de>,
"Joel Stanley" <joel@jms.id.au>
Subject: Re: [PATCH v6 06/12] soc: aspeed: Add XDMA Engine Driver
Date: Mon, 17 Feb 2020 10:26:57 +1030 [thread overview]
Message-ID: <3a053c3e-0fec-4ab9-b941-a335524b3303@www.fastmail.com> (raw)
In-Reply-To: <CAK8P3a3HsdpLz0aDGem1BrQsNo2mEJOnOsLcKFcLjaERx9dhGg@mail.gmail.com>
On Tue, 11 Feb 2020, at 03:05, Arnd Bergmann wrote:
> On Wed, Jan 15, 2020 at 10:31 PM Eddie James <eajames@linux.ibm.com> wrote:
> >
> > The XDMA engine embedded in the AST2500 and AST2600 SOCs performs PCI
> > DMA operations between the SOC (acting as a BMC) and a host processor
> > in a server.
> >
> > This commit adds a driver to control the XDMA engine and adds functions
> > to initialize the hardware and memory and start DMA operations.
> >
> > Signed-off-by: Eddie James <eajames@linux.ibm.com>
>
> Hi Eddie,
>
> I'm missing the bigger picture in the description here, how does this fit into
> the PCIe endpoint framework and the dmaengine subsystem?
>
> Does the AST2500 show up as a PCIe device in the host, or do you just
> inject DMAs into the host and hope that bypasses the IOMMU?
The host needs to coordinate out-of-band with the BMC to communicate host
addresses to be used. The host should configure the IOMMU as required before
triggering transfers (either from it's own XDMA interface or requesting the BMC
queue the transfer).
Andrew
next prev parent reply other threads:[~2020-02-16 23:57 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-15 21:29 [PATCH v6 00/12] aspeed: Add SCU interrupt controller and XDMA engine drivers Eddie James
2020-01-15 21:29 ` [PATCH v6 01/12] dt-bindings: interrupt-controller: Add Aspeed SCU interrupt controller Eddie James
2020-01-15 21:29 ` [PATCH v6 02/12] irqchip: " Eddie James
2020-01-15 21:29 ` [PATCH v6 03/12] ARM: dts: aspeed: ast2500: Add " Eddie James
2020-01-15 21:29 ` [PATCH v6 04/12] ARM: dts: aspeed: ast2600: Add SCU interrupt controllers Eddie James
2020-01-15 21:29 ` [PATCH v6 05/12] dt-bindings: soc: Add Aspeed XDMA Engine Eddie James
2020-01-17 0:01 ` Andrew Jeffery
2020-01-15 21:29 ` [PATCH v6 06/12] soc: aspeed: Add XDMA Engine Driver Eddie James
2020-01-17 0:07 ` Andrew Jeffery
2020-02-10 16:35 ` Arnd Bergmann
2020-02-10 17:10 ` Eddie James
2020-03-16 4:49 ` Joel Stanley
2020-02-16 23:56 ` Andrew Jeffery [this message]
2020-01-15 21:29 ` [PATCH v6 07/12] soc: aspeed: xdma: Add user interface Eddie James
2020-01-17 0:09 ` Andrew Jeffery
2020-01-15 21:29 ` [PATCH v6 08/12] soc: aspeed: xdma: Add reset ioctl Eddie James
2020-01-15 21:29 ` [PATCH v6 09/12] ARM: dts: aspeed: ast2500: Add XDMA Engine Eddie James
2020-01-15 21:29 ` [PATCH v6 10/12] ARM: dts: aspeed: ast2600: " Eddie James
2020-01-15 21:29 ` [PATCH v6 11/12] ARM: dts: aspeed: witherspoon: Enable " Eddie James
2020-01-17 0:12 ` Andrew Jeffery
2020-01-15 21:29 ` [PATCH v6 12/12] ARM: dts: aspeed: tacoma: Enable XDMA engine Eddie James
2020-01-17 0:13 ` Andrew Jeffery
2020-01-20 8:54 ` [PATCH v6 00/12] aspeed: Add SCU interrupt controller and XDMA engine drivers Marc Zyngier
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