From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jernej =?utf-8?B?xaBrcmFiZWM=?= Subject: Re: [PATCH 5/6] pwm: sun4i: Add support to output source clock directly Date: Sat, 27 Jul 2019 16:28:38 +0200 Message-ID: <4063694.66Ui2fGJfo@jernej-laptop> References: <20190726184045.14669-1-jernej.skrabec@siol.net> <20190726184045.14669-6-jernej.skrabec@siol.net> <20190727105008.he35sixfvoyl2lm7@flea.home> Reply-To: jernej.skrabec-gGgVlfcn5nU@public.gmane.org Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Return-path: Sender: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org In-Reply-To: <20190727105008.he35sixfvoyl2lm7-YififvaboMKzQB+pC5nmwQ@public.gmane.org> List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , To: Maxime Ripard Cc: thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, wens-jdAy2FN1RRM@public.gmane.org, robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, mark.rutland-5wv7dgnIgG8@public.gmane.org, linux-pwm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org List-Id: devicetree@vger.kernel.org Dne sobota, 27. julij 2019 ob 12:50:08 CEST je Maxime Ripard napisal(a): > On Fri, Jul 26, 2019 at 08:40:44PM +0200, Jernej Skrabec wrote: > > PWM core has an option to bypass whole logic and output unchanged source > > clock as PWM output. This is achieved by enabling bypass bit. > > > > Note that when bypass is enabled, no other setting has any meaning, not > > even enable bit. > > > > This mode of operation is needed to achieve high enough frequency to > > serve as clock source for AC200 chip, which is integrated into same > > package as H6 SoC. > > > > Signed-off-by: Jernej Skrabec > > It doesn't seem to be available on the A10 (at least) though. The A13 > seem to have it, so you should probably check that, and make that > conditional to the compatible if not available on all of them. Ok, can you suggest the name for the quirk? "has_bypass" is suspiciously similar to "has_prescaler_bypass". Also, how to name these sun4i_pwm_data structures? Now that there are (will be) three new quirks, name of the structure would be just too long, like "sun50i_pwm_dual_prescaler_bypass_clk_rst_bypass". Best regards, Jernej > > Maxime > > -- > Maxime Ripard, Bootlin > Embedded Linux and Kernel engineering > https://bootlin.com