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From: Schrempf Frieder <frieder.schrempf@kontron.de>
To: Jacky Bai <ping.bai@nxp.com>, Adam Ford <aford173@gmail.com>,
	Sudeep Holla <sudeep.holla@arm.com>
Cc: "Aisheng Dong" <aisheng.dong@nxp.com>,
	"mark.rutland@arm.com" <mark.rutland@arm.com>,
	"Peng Fan" <peng.fan@nxp.com>,
	"Souvik Chakravarty" <Souvik.Chakravarty@arm.com>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"Clément Faure" <clement.faure@nxp.com>,
	"s.hauer@pengutronix.de" <s.hauer@pengutronix.de>,
	"shawnguo@kernel.org" <shawnguo@kernel.org>,
	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	dl-linux-imx <linux-imx@nxp.com>,
	"kernel@pengutronix.de" <kernel@pengutronix.de>,
	"Andre Przywara" <andre.przywara@arm.com>,
	"Silvano Di Ninno" <silvano.dininno@nxp.com>,
	"Leonard Crestez" <leonard.crestez@nxp.com>,
	"festevam@gmail.com" <festevam@gmail.com>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"Lucas Stach" <l.stach@pengutronix.de>
Subject: Re: [PATCH 0/3] Add power domain driver support for i.mx8m family
Date: Thu, 13 Feb 2020 10:52:39 +0000	[thread overview]
Message-ID: <4b27c7d5-a716-ee6a-2dca-e97d9205024b@kontron.de> (raw)
In-Reply-To: <VI1PR04MB6992DF27336AC51945D1C0C1871A0@VI1PR04MB6992.eurprd04.prod.outlook.com>

On 13.02.20 10:21, Jacky Bai wrote:
>> -----Original Message-----
>> From: Schrempf Frieder <frieder.schrempf@kontron.de>
>> Sent: Thursday, February 13, 2020 5:16 PM
>> To: Adam Ford <aford173@gmail.com>; Sudeep Holla
>> <sudeep.holla@arm.com>
>> Cc: Aisheng Dong <aisheng.dong@nxp.com>; mark.rutland@arm.com; Peng
>> Fan <peng.fan@nxp.com>; Souvik Chakravarty
>> <Souvik.Chakravarty@arm.com>; Jacky Bai <ping.bai@nxp.com>;
>> devicetree@vger.kernel.org; Clément Faure <clement.faure@nxp.com>;
>> s.hauer@pengutronix.de; shawnguo@kernel.org; robh+dt@kernel.org;
>> dl-linux-imx <linux-imx@nxp.com>; kernel@pengutronix.de; Andre Przywara
>> <andre.przywara@arm.com>; Silvano Di Ninno <silvano.dininno@nxp.com>;
>> Leonard Crestez <leonard.crestez@nxp.com>; festevam@gmail.com;
>> linux-arm-kernel@lists.infradead.org; Lucas Stach <l.stach@pengutronix.de>
>> Subject: Re: [PATCH 0/3] Add power domain driver support for i.mx8m family
>>
>> Hi,
>>
>> On 07.11.19 22:28, Adam Ford wrote:
>>> On Thu, Apr 18, 2019 at 9:43 AM Sudeep Holla <sudeep.holla@arm.com>
>> wrote:
>>>>
>>>> On Wed, Apr 17, 2019 at 04:21:55PM +0000, Leonard Crestez wrote:
>>>>> On 4/17/2019 4:33 PM, Sudeep Holla wrote:
>>>>>>>> I don't yet buy the security argument. There are many more shared
>>>>>>>> parts on the SoC, like the clock controller, that would need to
>>>>>>>> be taken away from the non-secure world if one would want to run
>>>>>>>> an untrusted OS kernel on a i.MX8M system.
>>>>>>>>
>>>>>>>> To properly implement security on any i.MX8M based system the
>>>>>>>> firmware would need to grow something like a full ARM SCPI
>>>>>>>> implementation, so all shared critical peripherals are solely under
>> firmware control.
>>>>>>>
>>>>>>> It might be possible to rework this to use some form of
>>>>>>> SCMI-over-SMC instead of vendor-specific SMCCC SIP calls
>>>
>>> I was just curious to know if there is any progress being made on
>>> this.  The i.mx8mm-evk is missing functionality upstream and I think
>>> the power domain support would help enable some of these features.
>>>
>>
>> Has there been any decision or action taken in this topic?
>> Will the power domain driver as proposed in this patch be upstreamed at
>> some time, or rather not?
>>
>> I try to build a mainline BSP for i.MX8MM (ML U-Boot, ML TF-A, ML Linux)
>> and I integrated display and graphics support from the downstream NXP
>> kernel.
>>
>> While most things already work fine, there's the issue of how to handle the
>> power domains. Currently I need to ungate some clocks in the TF-A
>> BL31 to get for example the GPU running. If I understand this correctly the
>> proposed power domain driver could handle this in Linux otherwise.
>>
> 
> the SCMI over SMC is still under review
> 

Ok, I see. Thanks for the information.
Once the SCMI over SMC driver is available in Linux, what else needs to 
be done to handle the example case given above (GPU root clock ungate)?

I guess this would need an imx-specific handler in the TF-A. Is this 
interface already available in mainline TF-A?

  reply	other threads:[~2020-02-13 10:52 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-17  5:27 [PATCH 0/3] Add power domain driver support for i.mx8m family Jacky Bai
2019-04-17  5:27 ` [PATCH 1/3] dt-bindings: power: Add power domain binding " Jacky Bai
2019-04-17  5:27 ` [PATCH 2/3] soc: imx: Add power domain driver support " Jacky Bai
2019-04-17  5:27 ` [PATCH 3/3] arm64: dts: freescale: Add power domain nodes for i.mx8mm Jacky Bai
2019-04-17 11:16 ` [PATCH 0/3] Add power domain driver support for i.mx8m family Aisheng Dong
2019-04-17 12:13   ` Lucas Stach
2019-04-17 12:40     ` Leonard Crestez
2019-04-17 12:54       ` Lucas Stach
2019-04-17 13:25         ` Sudeep Holla
2019-04-17 12:54       ` Peng Fan
2019-04-17 13:33       ` Sudeep Holla
2019-04-17 16:21         ` Leonard Crestez
2019-04-18 14:43           ` Sudeep Holla
2019-11-07 21:28             ` Adam Ford
2020-02-13  9:16               ` Schrempf Frieder
2020-02-13  9:21                 ` Jacky Bai
2020-02-13 10:52                   ` Schrempf Frieder [this message]
2020-02-13 11:32                   ` Lucas Stach
2020-02-13 14:30                     ` Leonard Crestez
2020-02-13 14:47                       ` Lucas Stach
2020-02-13 15:19                         ` Leonard Crestez
2020-02-13 15:58                           ` Lucas Stach
2020-02-13 16:16                             ` Schrempf Frieder
2019-04-17 13:23     ` Sudeep Holla
2019-04-17 13:36       ` Sudeep Holla
2019-04-17 12:39 Jacky Bai
2019-04-17 14:30 Jacky Bai
2019-04-17 14:43 ` Sudeep Holla
2019-04-18  1:54 Jacky Bai
2019-04-20 13:38 Peng Fan
2019-04-23 11:07 ` Sudeep Holla
2019-04-23 14:02   ` Peng Fan

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