From: Marek Szyprowski <m.szyprowski@samsung.com>
To: Krzysztof Kozlowski <krzk@kernel.org>
Cc: "linux-samsung-soc@vger.kernel.org"
<linux-samsung-soc@vger.kernel.org>,
linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Jaehoon Chung <jh80.chung@samsung.com>,
Jingoo Han <jingoohan1@gmail.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Vinod Koul <vkoul@kernel.org>,
Kishon Vijay Abraham I <kishon@ti.com>,
Rob Herring <robh+dt@kernel.org>
Subject: Re: [PATCH 2/6] Documetation: dt-bindings: add the samsung,exynos-pcie binding
Date: Wed, 21 Oct 2020 13:59:25 +0200 [thread overview]
Message-ID: <50b13de0-168b-3fad-1e84-cc86f1a376d8@samsung.com> (raw)
In-Reply-To: <CAJKOXPcyruYQxcioPxGE8J8jS0Yey+09HpXxFgQm4f2w98s5cg@mail.gmail.com>
Hi Krzysztof,
On 19.10.2020 12:18, Krzysztof Kozlowski wrote:
> On Mon, 19 Oct 2020 at 12:12, Krzysztof Kozlowski <krzk@kernel.org> wrote:
>> On Mon, Oct 19, 2020 at 11:47:11AM +0200, Marek Szyprowski wrote:
>>> From: Jaehoon Chung <jh80.chung@samsung.com>
>>>
>>> Add dt-bindings for the Samsung Exynos PCIe controller (Exynos5433
>>> variant).
>> The title has typo and actually entire "Doc" should be dropped. Just
>> "dt-bindings: pci:". This applies to all DT patches.
>>
>>> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
>>> [mszyprow: updated the binding to latest driver changes, rewrote it in yaml,
>>> rewrote commit message]
>> If you wrote them in YAML it should be a new patch of yours. It is the
>> same then as converting TXT to YAML.
>>
>>> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
>>> ---
>>> .../bindings/pci/samsung,exynos-pcie.yaml | 106 ++++++++++++++++++
>>> 1 file changed, 106 insertions(+)
>>> create mode 100644 Documentation/devicetree/bindings/pci/samsung,exynos-pcie.yaml
>>>
>>> diff --git a/Documentation/devicetree/bindings/pci/samsung,exynos-pcie.yaml b/Documentation/devicetree/bindings/pci/samsung,exynos-pcie.yaml
>>> new file mode 100644
>>> index 000000000000..48fb569c238c
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/pci/samsung,exynos-pcie.yaml
>>> @@ -0,0 +1,104 @@
>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>>> +%YAML 1.2
>>> +---
>>> +$id: https://protect2.fireeye.com/v1/url?k=a6caf3f8-fb18e55d-a6cb78b7-0cc47a31bee8-bb3776dee0a03bbb&q=1&e=5f1b0c1e-e4d1-4ae2-b527-8cd5ec52695f&u=http%3A%2F%2Fdevicetree.org%2Fschemas%2Fpci%2Fsamsung%2Cexynos-pcie.yaml%23
>>> +$schema: https://protect2.fireeye.com/v1/url?k=591573a2-04c76507-5914f8ed-0cc47a31bee8-bd08b2eac7a5040d&q=1&e=5f1b0c1e-e4d1-4ae2-b527-8cd5ec52695f&u=http%3A%2F%2Fdevicetree.org%2Fmeta-schemas%2Fcore.yaml%23
>>> +
>>> +title: Samsung SoC series PCIe Host Controller Device Tree Bindings
>>> +
>>> +maintainers:
>>> + - Jaehoon Chung <jh80.chung@samsung.com>
>>> +
>>> +description: |+
>>> + Exynos5433 SoC PCIe host controller is based on the Synopsys DesignWare
>>> + PCIe IP and thus inherits all the common properties defined in
>>> + designware-pcie.txt.
>>> +
>>> +allOf:
>>> + - $ref: /schemas/pci/pci-bus.yaml#
>>> +
>>> +properties:
>>> + compatible:
>>> + enum:
>>> + - samsung,exynos5433-pcie
>> const, not enum
>>
>>> +
>>> + reg:
>>> + items:
>>> + - description: External Local Bus interface (ELBI) registers.
>>> + - description: Data Bus Interface (DBI) registers.
>>> + - description: PCIe configuration space region.
>>> +
>>> + reg-names:
>>> + items:
>>> + - const: elbi
>>> + - const: bdi
>>> + - const: config
>>> +
>>> + interrupts:
>>> + maxItems: 1
>>> +
>>> + clocks:
>>> + items:
>>> + - description: PCIe bridge clock
>>> + - description: PCIe bus clock
>>> +
>>> + clock-names:
>>> + items:
>>> + - const: pcie
>>> + - const: pcie_bus
>>> +
>>> + phys:
>>> + maxItems: 1
>>> +
>>> + phy-names:
>>> + const: pcie-phy
>>> +
>>> + vdd10-supply:
>>> + description:
>>> + Phandle to a regulator that provides 1.0V power to the PCIe block.
>>> +
>>> + vdd18-supply:
>>> + description:
>>> + Phandle to a regulator that provides 1.8V power to the PCIe block.
>>> +
>>> +required:
>>> + - reg
>>> + - reg-names
>>> + - interrupts
>>> + - interrupt-names
>>> + - clocks
>>> + - clock-names
>>> + - phys
>>> + - phy-names
>>> + - vdd10-supply
>> additionalProperties: false
> This can be unevaluatedProperties, since you include pci-bus schema.
> However still you should either include designware schema or include
> it's properties here.
Frankly, I would like to include designware-pci bindling/schema, but it
has not been converted to yaml yet. I don't feel that I know PCI enough
to do that conversion...
Best regards
--
Marek Szyprowski, PhD
Samsung R&D Institute Poland
next prev parent reply other threads:[~2020-10-21 12:00 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20201019094737eucas1p283ea94186450c0756442624d95de627f@eucas1p2.samsung.com>
2020-10-19 9:47 ` [PATCH 0/6] Add DW PCIe support for Exynos5433 SoCs Marek Szyprowski
[not found] ` <CGME20201019094738eucas1p29b377b561089cfc3eba1755d475125b9@eucas1p2.samsung.com>
2020-10-19 9:47 ` [PATCH 1/6] Documetation: dt-bindings: drop samsung,exynos5440-pcie binding Marek Szyprowski
2020-10-19 10:08 ` Krzysztof Kozlowski
2020-10-19 20:07 ` Rob Herring
[not found] ` <CGME20201019094739eucas1p18cd4c7e5a0197393d2e7c5c6fcc2777d@eucas1p1.samsung.com>
2020-10-19 9:47 ` [PATCH 2/6] Documetation: dt-bindings: add the samsung,exynos-pcie binding Marek Szyprowski
2020-10-19 10:12 ` Krzysztof Kozlowski
2020-10-19 10:18 ` Krzysztof Kozlowski
2020-10-21 11:59 ` Marek Szyprowski [this message]
2020-10-21 12:12 ` Krzysztof Kozlowski
2020-10-19 10:28 ` Krzysztof Kozlowski
2020-10-19 13:38 ` Rob Herring
2020-10-21 12:05 ` Marek Szyprowski
[not found] ` <CGME20201019094739eucas1p17424b1224bf2a1a5b16c33deb4209166@eucas1p1.samsung.com>
2020-10-19 9:47 ` [PATCH 3/6] Documetation: dt-bindings: add the samsung,exynos-pcie-phy binding Marek Szyprowski
2020-10-19 10:14 ` Krzysztof Kozlowski
2020-10-19 20:09 ` Rob Herring
[not found] ` <CGME20201019094740eucas1p10ea264deb2cd185858d0dfdd9f6ed6fe@eucas1p1.samsung.com>
2020-10-19 9:47 ` [PATCH 4/6] phy: samsung: phy-exynos-pcie: rework driver to support Exynos5433 PCIe PHY Marek Szyprowski
2020-10-19 10:16 ` Krzysztof Kozlowski
[not found] ` <CGME20201019094740eucas1p2cd873b29bc19708f9a712d955cba62fe@eucas1p2.samsung.com>
2020-10-19 9:47 ` [PATCH 5/6] pci: dwc: pci-exynos: rework the driver to support Exynos5433 variant Marek Szyprowski
2020-10-19 10:21 ` Krzysztof Kozlowski
[not found] ` <CGME20201019094741eucas1p1b4934cd5024a18804fcee921294acee0@eucas1p1.samsung.com>
2020-10-19 9:47 ` [PATCH 6/6] arm64: dts: exynos: add the WiFi/PCIe support to TM2(e) boards Marek Szyprowski
2020-10-19 10:31 ` Krzysztof Kozlowski
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