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From: Akash Asthana <akashast@codeaurora.org>
To: Evan Green <evgreen@chromium.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Andy Gross <agross@kernel.org>,
	Bjorn Andersson <bjorn.andersson@linaro.org>,
	wsa@the-dreams.de, Mark Brown <broonie@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Rob Herring <robh+dt@kernel.org>,
	linux-i2c@vger.kernel.org, linux-spi@vger.kernel.org,
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
	<devicetree@vger.kernel.org>, Stephen Boyd <swboyd@chromium.org>,
	Manu Gautam <mgautam@codeaurora.org>,
	linux-arm-msm <linux-arm-msm@vger.kernel.org>,
	linux-serial@vger.kernel.org,
	Matthias Kaehlcke <mka@chromium.org>,
	Doug Anderson <dianders@chromium.org>
Subject: Re: [PATCH V2 2/8] soc: qcom: geni: Support for ICC voting
Date: Fri, 27 Mar 2020 11:03:30 +0530
Message-ID: <51bdf6b5-28b1-64ca-011d-59990012569f@codeaurora.org> (raw)
In-Reply-To: <CAE=gft5Uucr83DoQqaE7_8_H=ExnkPBQvRiUK_+LxOMeadam_g@mail.gmail.com>

Hi Evan,

On 3/20/2020 10:15 PM, Evan Green wrote:
> On Fri, Mar 20, 2020 at 4:03 AM Akash Asthana <akashast@codeaurora.org> wrote:
>> Hi Evan,
>>
>> +/* Core 2X clock frequency to BCM threshold mapping */
>> +#define CORE_2X_19_2_MHZ               960
>> +#define CORE_2X_50_MHZ                 2500
>> +#define CORE_2X_100_MHZ                        5000
>> +#define CORE_2X_150_MHZ                        7500
>> +#define CORE_2X_200_MHZ                        10000
>> +#define CORE_2X_236_MHZ                        16383
>>
>> These are all just 50 * clock_rate. Can you instead specify that one
>> define of CLK_TO_BW_RATIO 50, and then use clk_get_rate() to get the
>> input clock frequency. That way, if these end up getting clocked at a
>> different rate, the bandwidth also scales appropriately. Also, can you
>> enumerate why 50 is an appropriate ratio?
>> -Evan
>>
>> -Evan
>>
>> Clock rate for Core 2X is controlled by BW voting only, we don't set clock rate for core 2X clock either by DFS or calling clk_set_rate API like we do for SE clocks from individual driver.
>>
>> In DT node it's not mentioned as clock.
>>
>> As discussed in patch@ https://patchwork.kernel.org/patch/11436897/  We are not scaling Core 2X clock based on dynamic need of driver instead we are putting recommended value from HW team for each driver.
> Oh I get it. This is pretty opaque, since this table is saying "here
> are the bandwidth values that happen to work out to a Core2X clock
> rate of N".

Hmm,  BCM threshold to CORE2X clock rate mapping is exposed to us from 
clock team.

BCM threshold value is internally convert to mentioned clock rate this 
is something internal to board ICC driver.

>   But it's not obvious why setting the Core2X clock rate to
> N is desirable or appropriate. The answer seems to be hardware guys
> told us these thresholds work well in practice.
Yes, this is correct as the core clocks behaves different than any other 
NOC, we rely on the recommendation from VI/HW team.
>   And if I'm reading
> into it more, probably they're saying these bandwidths are too low to
> be worth dynamically managing beyond on/off
I am not sure whether they intend to say this.
> At the very least we should explain some of this in the comment above
> these defines. Something like:
> /* Define bandwidth thresholds that cause the underlying Core 2X
> interconnect clock to run at the named frequency. These baseline
> values are recommended by the hardware team, and are not dynamically
> scaled with GENI bandwidth beyond basic on/off. */
> -Evan

Ok,

regards,

Akash

-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,\na Linux Foundation Collaborative Project

  reply index

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-13 13:12 [PATCH V2 0/8] Add interconnect support to QSPI and QUP drivers Akash Asthana
2020-03-13 13:12 ` [PATCH V2 1/8] interconnect: Add devm_of_icc_get() as exported API for users Akash Asthana
2020-03-13 16:26   ` Matthias Kaehlcke
2020-03-27 23:02   ` Bjorn Andersson
2020-03-13 13:12 ` [PATCH V2 2/8] soc: qcom: geni: Support for ICC voting Akash Asthana
2020-03-13 16:42   ` Matthias Kaehlcke
2020-03-17  9:58     ` Akash Asthana
2020-03-17 19:06   ` Evan Green
     [not found]     ` <74851dda-296d-cdc5-2449-b9ec59bbc057@codeaurora.org>
2020-03-20 16:45       ` Evan Green
2020-03-27  5:33         ` Akash Asthana [this message]
2020-03-13 13:12 ` [PATCH V2 3/8] soc: qcom-geni-se: Add interconnect support to fix earlycon crash Akash Asthana
2020-03-13 20:44   ` Matthias Kaehlcke
2020-03-17 10:57     ` Akash Asthana
2020-03-17 18:29       ` Matthias Kaehlcke
2020-03-18  8:54         ` Akash Asthana
2020-03-19 19:43           ` Matthias Kaehlcke
2020-03-20 10:22             ` Akash Asthana
2020-03-20 16:30               ` Evan Green
2020-03-27  5:04                 ` Akash Asthana
2020-03-27 23:23                 ` Bjorn Andersson
2020-03-31 10:55                   ` Akash Asthana
2020-03-17 19:08       ` Evan Green
2020-03-17 19:46         ` Doug Anderson
2020-03-18 10:57         ` Akash Asthana
2020-03-18 16:22           ` Evan Green
2020-03-13 13:12 ` [PATCH V2 4/8] tty: serial: qcom_geni_serial: Add interconnect support Akash Asthana
2020-03-13 21:28   ` Matthias Kaehlcke
2020-03-17 11:48     ` Akash Asthana
2020-03-17 19:08       ` Matthias Kaehlcke
2020-03-18 12:23         ` Akash Asthana
2020-03-19 20:42           ` Matthias Kaehlcke
2020-03-20 10:35             ` Akash Asthana
2020-03-13 13:12 ` [PATCH V2 5/8] i2c: i2c-qcom-geni: " Akash Asthana
2020-03-14  0:17   ` Matthias Kaehlcke
2020-03-17 11:51     ` Akash Asthana
2020-03-13 13:12 ` [PATCH V2 6/8] spi: spi-geni-qcom: " Akash Asthana
2020-03-13 13:16   ` Mark Brown
2020-03-17  9:35     ` Akash Asthana
2020-03-17 13:06       ` Mark Brown
2020-03-20 13:52         ` Akash Asthana
2020-03-14  0:41   ` Matthias Kaehlcke
2020-03-17 12:11     ` Akash Asthana
2020-03-13 13:12 ` [PATCH V2 7/8] spi: spi-qcom-qspi: " Akash Asthana
2020-03-14  0:58   ` Matthias Kaehlcke
2020-03-17 12:13     ` Akash Asthana
2020-03-17 19:08       ` Evan Green
2020-03-18 13:48         ` Akash Asthana
2020-03-18 16:30           ` Evan Green
2020-03-20  5:35             ` Akash Asthana
2020-03-13 13:12 ` [PATCH V2 8/8] arm64: dts: sc7180: Add interconnect for QUP and QSPI Akash Asthana

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