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Mon, 7 Jun 2021 08:34:47 +0000 Subject: Re: [PATCH 1/4] arm64: dts: imx8mm-venice-gw700x: override thermal cfg for industrial temp To: Jacky Bai , "tharvey@gateworks.com" Cc: Rob Herring , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , dl-linux-imx , Device Tree Mailing List , Linux ARM Mailing List References: <20210601174917.1979-1-tharvey@gateworks.com> <5eba4438-239c-71d1-56ec-4edd70e87ec3@kontron.de> <273e2859-7874-e273-9599-139274891023@kontron.de> From: Frieder Schrempf Message-ID: <717608d8-685a-0435-aaa2-3bd4f82f3b97@kontron.de> Date: Mon, 7 Jun 2021 10:34:45 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.8.1 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [109.250.131.46] X-ClientProxiedBy: AM6PR05CA0033.eurprd05.prod.outlook.com (2603:10a6:20b:2e::46) To AM0PR10MB2963.EURPRD10.PROD.OUTLOOK.COM (2603:10a6:208:157::14) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from [192.168.10.32] (109.250.131.46) by AM6PR05CA0033.eurprd05.prod.outlook.com (2603:10a6:20b:2e::46) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4195.22 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData: =?utf-8?B?Rkoya3ljV3J4b2QvRGRONXRiUHpCTDVDVzlUZk52MnNNSDdMTjVrcXM4eW1C?= =?utf-8?B?dzc5RldzTyt4b2FOQll3VHV4MWl6aStGZk9pQ0J4eWdnNXV5MU40RG5Ya0Vp?= =?utf-8?B?SjlpdjgrTjBwTnRmSkgydzhuaWdtTExpVTdDblIzblpLVXBrd0xCUjdCUzdo?= =?utf-8?B?MklyVUtMQ1JlU002QUFUQ25zR2VPdFg0T3hXMXFnTlF1TEM5Z2dUbzZQRFlO?= =?utf-8?B?bzBHUUUvYUd5L0dCaUdHK2s2WHV1RDd1c0RhaTl4Z3RCR0ZMd2VEbkhZakRO?= =?utf-8?B?d21nVlJPUkVWTW13QlB0RGFETWtZQXpjNXgrTGdnRm1QblFxZXc1TDc3RnFP?= =?utf-8?B?TWRrR0M3STE3NFBLb0tXbG5jM29OMlpFTkhHb0xBdjFnTk1oMFpmN1FNM2ZQ?= =?utf-8?B?Wi83eVFuY2RpNSt6djNLVm5DcjFlSGM4MzlFMHU0SXVwdDQzWEdGbCtsM1VU?= =?utf-8?B?UG9mc3h0cHFsQWxHcUJtSmVob0RIUmVKNG9CU0wyaVVwQkliamtKdmNrWnps?= =?utf-8?B?MGJXUFZlaG1iVlN4dEZZT1prbFN3RSsrWVF2UnR0VTVhcWluSEczNkJlWCtC?= =?utf-8?B?QkRaREZaQjVkM1FDWldBRDBzRUNkMzY4aTN6SjdNUU1GUlFxQjlZMHdtaDZa?= =?utf-8?B?SDNsWll2UGtWbVppbnNxN2hqOU1PVitIOVJmQSttbWpUUGFGSkExV3RuRTNy?= =?utf-8?B?Nzlnc2czL0EwMzRKMDNGeFA1enZyUE9Xbks0QzJZeWpqcGNrWTZUMkczWDFK?= =?utf-8?B?cERSRkgrOFRCVWhsZTdIQUxieDF0L1VSeWxpVmpDUWJTTFY1dkxuUExLMUxE?= =?utf-8?B?N2JRUXZOVGhmVjZaeHJYZ2ZXcXNzdUNRajNvVXJPRWRsOEoyZ0gxWFIvZ29t?= =?utf-8?B?eGdkRE1SUU1MaDFmZ2pOZWoyTnh1dE5mc1U3V1p2dSs0WTlNSkZ2VHFINXZu?= =?utf-8?B?NnZrUVFKOUxZZjFwb1RKZnA4OWxtY3RQczNJMEQyVnB0eTdNMEpXODdxT05r?= =?utf-8?B?WVpQQWppazZUelZycHJPUUE5YlVUV2NYOTRyVkRTMGpOOHpGVXU4bE1pTmlJ?= =?utf-8?B?a0hqanNkaWZyNkRwNzdRNTRJU3VrekFURWlQWWViZE5RbDVkdnk5dnhCc1Vu?= =?utf-8?B?bHNnSXUyTzdKYXB6aXA1V2JZakFQWGNyZVE0UXJ3LzlPN0hFcWxudDNzaEJK?= =?utf-8?B?a0JQVmJoWUVnek11OHVtc3ZmdWpwNG4yMlh5KzB1ZTNiRndFZkxSZGVMaVVt?= =?utf-8?B?bjBGTHYwNGRHdTRabjJRcTIwdFo3ZHBNdU1YMGE4WEF3VFhrTmtQWC96MjV5?= =?utf-8?B?VE9OVDlVR2dQYy9HeEFLRm4zMEdkRkc1WitjVXRMZ3VqSk9RQW5wZHZKbStJ?= =?utf-8?B?SVZoTTlXZmJjVFZ5aXNLVUl1VzRvb0lVekV2OHNuekZYT3crWXRrMUF5ZFpC?= =?utf-8?B?MWRXRkZ3ck5wbzNsMTlVU0NZZHNKYVlIRm1vY0FxRW8wb2JtQXRpM084UUN6?= =?utf-8?B?NmFZaGwwbGkwa0tUZFhuSVFWSytqNWRkMGZ4UVhjZGlRQlloWCt3NUFzOHly?= =?utf-8?B?OGpuZ0hjZFdvVmVidkFJcjJ2RHRjVUVQNlo1OUZEVFkrOXNsYlJXNnBVdlNC?= =?utf-8?B?RlFzSkV2aFNJL3E2RWlDTGVYZEhnaThrVkNsaHl4aXZjUDNLRUt5bFZJTnFQ?= =?utf-8?B?eHdUZE5VR3ZRak13YnRqVGc4cytDdEhLUDVyZ0RtYnB5UFpVNk1QckUvdVFN?= =?utf-8?Q?TJPJKjvUCTCARaTgPkomzPPYMQH6Nd0IyFKmWRm?= X-OriginatorOrg: kontron.de X-MS-Exchange-CrossTenant-Network-Message-Id: 37145d88-250f-4540-ed75-08d9298f1bf8 X-MS-Exchange-CrossTenant-AuthSource: AM0PR10MB2963.EURPRD10.PROD.OUTLOOK.COM X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Jun 2021 08:34:47.7735 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 8c9d3c97-3fd9-41c8-a2b1-646f3942daf1 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: Rw9aB/C7kPtQTXkODvahfjtS0lYmLz/gq8QAK21sZ502taCZF+ksZYfjMSdMZ+T+tE4Fl9AftN+XUiOH/HiIy2jcOSKwybNaqIVPntoqErU= X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM8PR10MB4146 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 07.06.21 10:00, Jacky Bai wrote: >> Subject: Re: [PATCH 1/4] arm64: dts: imx8mm-venice-gw700x: override >> thermal cfg for industrial temp >> >> On 07.06.21 09:30, Jacky Bai wrote: >>>> Subject: Re: [PATCH 1/4] arm64: dts: imx8mm-venice-gw700x: override >>>> thermal cfg for industrial temp >>>> >>>> On 04.06.21 17:42, Tim Harvey wrote: >>>>> On Wed, Jun 2, 2021 at 12:11 AM Frieder Schrempf >>>>> wrote: >>>>>> >>>>>> On 01.06.21 19:49, Tim Harvey wrote: >>>>>>> Override the default temperature alert/crit for Industrial temp >>>>>>> IMX8M Mini. >>>>>>> >>>>>>> Signed-off-by: Tim Harvey >>>>>>> --- >>>>>>> .../boot/dts/freescale/imx8mm-venice-gw700x.dtsi | 12 >>>> ++++++++++++ >>>>>>> 1 file changed, 12 insertions(+) >>>>>>> >>>>>>> diff --git >>>>>>> a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw700x.dtsi >>>>>>> b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw700x.dtsi >>>>>>> index c769fadbd008..512b76cd7c3b 100644 >>>>>>> --- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw700x.dtsi >>>>>>> +++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw700x.dtsi >>>>>>> @@ -493,3 +493,15 @@ >>>>>>> >; >>>>>>> }; >>>>>>> }; >>>>>>> + >>>>>>> +&cpu_alert0 { >>>>>>> + temperature = <95000>; >>>>>>> + hysteresis = <2000>; >>>>>>> + type = "passive"; >>>>>>> +}; >>>>>>> + >>>>>>> +&cpu_crit0 { >>>>>>> + temperature = <105000>; >>>>>>> + hysteresis = <2000>; >>>>>>> + type = "critical"; >>>>>>> +}; >>>>>> >>>>>> As this is not really board-specific, I think the proper way to >>>>>> handle this for >>>> all boards is to let the thermal driver read the temperature grading >>>> from the OTP fuses and set the trip-points accordingly, similar to >>>> what is done on i.MX6 [1]. >>>>>> >>> ... >>>>> >>>>> Frieder, >>>>> >>>>> Yes, I thought about adding that kind of support to imx8mm_thermal.c >>>>> but the difference is that imx8mm has alerts defined by dt and imx6 >>>>> does not so is it right to override dt alerts on imx8m? What if >>>>> someone designs a board that they specifically want a lower alert >>>>> than the cpu grade they are using based on something else on the board? >>>>> >>>>> My approach to this was to eventually actually adjust the imx8m dt >>>>> alerts in boot firmware based on some boot firmware setting or >>>>> specific board support and leave the kernel alone. >>>> >>>> Allowing board-specific trip points sounds like a valid request, but >>>> I still think we need a way to handle the temperature grading in the >>>> driver if no board-specific trip-points are given. >>>> >>>> What if we just set the temperature property in the trip nodes in >>>> imx8mm.dtsi to zero? The thermal driver would detect this and setup >>>> the correct values according to the grading. If the dt already >>>> provides non-zero temperature values (through the board dts) the >>>> driver will just leave the values and disregard the grading. >>>> >>>> I think this solution would be covering all needs. >>> >>> I thought to add the grading check in the imx8mm_thermal.c to >>> dynamically set the trip points temp, but it seems hard to do it due >>> to the fact of_thermal is used, as no helper API is exported by of_thermal, >> no better way to override the trip point temp. >>> >>> glad to see any good suggestions. >> >> Right, the driver doesn't handle the trip-points directly. This is all hidden in the >> framework. So this might not be so easy to implement. >> >> What about this other approach: Adding all the possible trip-points for the >> different gradings to the SoC-devicetree and then let the thermal driver >> remove the trip nodes from the dt that are not valid for the detected grading, >> just before the driver registers the sensor/zone. > > It is more reasonable for the firmware/bootloader to handle this by checking the grading. If possible, I would rather like to avoid creating another dependency on bootloader/firmware. I think the kernel should be able to detect the grading by itself and adjust its behavior accordingly. We also do this for the speed grading in cpufreq.