From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.4 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 49A77C432C3 for ; Tue, 26 Nov 2019 23:19:52 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1290320674 for ; Tue, 26 Nov 2019 23:19:52 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=samsung.com header.i=@samsung.com header.b="lvyssS/y" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726231AbfKZXTv (ORCPT ); Tue, 26 Nov 2019 18:19:51 -0500 Received: from mailout2.samsung.com ([203.254.224.25]:10430 "EHLO mailout2.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726504AbfKZXTv (ORCPT ); Tue, 26 Nov 2019 18:19:51 -0500 Received: from epcas1p4.samsung.com (unknown [182.195.41.48]) by mailout2.samsung.com (KnoxPortal) with ESMTP id 20191126231947epoutp02d27e43e52e5515e0b72faf888552e6cc~a2bQjH-OJ0752707527epoutp02R for ; Tue, 26 Nov 2019 23:19:47 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 mailout2.samsung.com 20191126231947epoutp02d27e43e52e5515e0b72faf888552e6cc~a2bQjH-OJ0752707527epoutp02R DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=samsung.com; s=mail20170921; t=1574810387; bh=Ji4cnZm4BXhP+LF1Lgk0+EgkkAxbfAnhq9Me2pJPuIw=; h=Subject:To:Cc:From:Date:In-Reply-To:References:From; b=lvyssS/ydklsihuu6EgNNvWvVtkjYhRpIgp3aqoOU4FLa+vPLktXqfOApLy4RGj90 c7PPhjbjT5tr2UzLbHnt9etPTQ57d2V5taPf4qks1g9LYfUTf0y0z+4/11kVgyk1XZ ewIEpzE0GSPcUOy3kl0QBh7aW/ajHcgfYdP4M9MM= Received: from epsnrtp4.localdomain (unknown [182.195.42.165]) by epcas1p2.samsung.com (KnoxPortal) with ESMTP id 20191126231946epcas1p2ea532486ea80695eb2f1bd9d660f2ee3~a2bPcW6Gf1616816168epcas1p2E; Tue, 26 Nov 2019 23:19:46 +0000 (GMT) Received: from epsmges1p4.samsung.com (unknown [182.195.40.156]) by epsnrtp4.localdomain (Postfix) with ESMTP id 47N0H265kKzMqYkY; Tue, 26 Nov 2019 23:19:42 +0000 (GMT) Received: from epcas1p4.samsung.com ( [182.195.41.48]) by epsmges1p4.samsung.com (Symantec Messaging Gateway) with SMTP id A2.04.48019.E03BDDD5; Wed, 27 Nov 2019 08:19:42 +0900 (KST) Received: from epsmtrp1.samsung.com (unknown [182.195.40.13]) by epcas1p2.samsung.com (KnoxPortal) with ESMTPA id 20191126231942epcas1p2017370a78a1fbab9bd1b6dc00b60d4ef~a2bLgAOo81986019860epcas1p2M; Tue, 26 Nov 2019 23:19:42 +0000 (GMT) Received: from epsmgms1p1new.samsung.com (unknown [182.195.42.41]) by epsmtrp1.samsung.com (KnoxPortal) with ESMTP id 20191126231941epsmtrp10625413b49f837a71ea879d20efd2daf~a2bLe3MOA1689216892epsmtrp1F; Tue, 26 Nov 2019 23:19:41 +0000 (GMT) X-AuditID: b6c32a38-257ff7000001bb93-8e-5dddb30eae2f Received: from epsmtip2.samsung.com ( [182.195.34.31]) by epsmgms1p1new.samsung.com (Symantec Messaging Gateway) with SMTP id FB.E9.10238.D03BDDD5; Wed, 27 Nov 2019 08:19:41 +0900 (KST) Received: from [10.113.221.102] (unknown [10.113.221.102]) by epsmtip2.samsung.com (KnoxPortal) with ESMTPA id 20191126231941epsmtip2f89c28cf9f0b573a471d1d834a269a92~a2bK_A5_Z0204302043epsmtip2y; Tue, 26 Nov 2019 23:19:41 +0000 (GMT) Subject: Re: [PATCH v7 4/5] PM / devfreq: Add dynamic scaling for imx8m ddr controller To: Rob Herring Cc: Leonard Crestez , Stephen Boyd , MyungJoo Ham , Kyungmin Park , "Rafael J. Wysocki" , Shawn Guo , Mark Rutland , Michael Turquette , =?UTF-8?B?QXJ0dXIgxZp3aWdvxYQ=?= , Saravana Kannan , Angus Ainslie , Martin Kepplinger , Matthias Kaehlcke , Krzysztof Kozlowski , Alexandre Bailon , Georgi Djakov , Dong Aisheng , Abel Vesa , Jacky Bai , Anson Huang , Fabio Estevam , Viresh Kumar , Silvano di Ninno , devicetree@vger.kernel.org, "open list:THERMAL" , linux-clk , NXP Linux Team , Sascha Hauer , "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" From: Chanwoo Choi Organization: Samsung Electronics Message-ID: <7224948f-8489-ffcd-9a51-bb7da7ee5e0a@samsung.com> Date: Wed, 27 Nov 2019 08:25:46 +0900 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.9.0 MIME-Version: 1.0 In-Reply-To: Content-Language: en-US Content-Transfer-Encoding: 7bit X-Brightmail-Tracker: H4sIAAAAAAAAA01TbUxTVxje6f3orVnlrsA41kTw6mbAIK1QPC5glkz0JuMHZsuykRB2Q++A 0K/1tsaPxOEShBaG4kSk4iA6tFaztQUHKoxRujFkomDsRMSZ1Im4AUHGJjBlbS9m/HvyvM/z vu/znhwKU3RLlVSxwcKbDZyOIVfg3/UkqpJXtozmqXrH1cj30yUpmu2/BtDZoR8B+qv2CoaC v40A1FZfgBr9AwTytIzgqK7TSyJX7WUc3bjhlqLrn/8pRc7RaQJ5gwECTVfdJ5B9/jyGZr7w A9T866AEBZw1BJpxBwEavJaFRg46SXRhoJtEv/QPEais0y9Fdt9zEr0IeHD0uDUONZ8JYMgz y769hq21OwF78auLgJ26UyZlT5YO4myT18p6XTaSvRfoINmWrz9jPZPtErZ7skPCHn6uYud7 YtnW2+U4W93qAuyMd01OVG5JRhHPaXlzAm8oMGqLDYWZzLvv5b+Tr0lXqZPVW9EWJsHA6flM Znt2TvKOYl3oRkzCbk5nDVE5nCAwKdsyzEarhU8oMgqWTIY3aXWmraZNAqcXrIbCTQVG/Vtq lWqzJiT8uKTo1M0TmOnF6j3eiSZQCsZi7EBGQToNehZdEjtYQSnodgAnpn4H4YKCfgrg4lCG WPgbwCd1o/hLx0jjEC4WOgEMnlhYsk8BePyHW1hYFU1/CJ1Xv484Yuj10D12N8Jj9HUZ7BtK CWOSToJdj++QYRxFr4W3nwUjo+X0Nlj76GyEx+k3YFtlUwhTVGyoZ/8sJ0peg331DyPtZfQu 6PimCxfbx8G7DxslIo6HbRMNWHg3SP9MwSPjDYSYYDusrHeRIo6GT3pbpSJWwvHDh5bwfni+ z0+K5goAW7tuLplTYVfzl5LwQhidCL+9kiLSa+HlhVNAHLwSTs5WEWEJpOWw4pBClKyDtx6M SkS8Cp4pt5FHAONYFsexLIJjWQTH/8OaAO4Cr/MmQV/IC2pT2vLH9oLI90lC7aBjINsHaAow r8rpqNE8BcHtFvbqfQBSGBMj39hzL08h13J79/FmY77ZquMFH9CEjl2DKWMLjKHPaLDkqzWb U1NTUZo6XaNWM3Fy6tlgnoIu5Cx8Cc+bePNLn4SSKUvB+9V/uLI+eDBw+lLD/KqD0dlal3+f pqxZZt5vsxVVIfPqY7vclqNumWas5v788CfHcq8eqFC62te5Y6kdc3O5H0VXLlgmXOVZw/jJ PQQxWc89ffNAXfrOT0/3z9VWZ5yb/nfLhepHi6rhKFQ1c/Qf24ZXmN66DfEbd2LR1cfjE8fr GFwo4tRJmFng/gN1YZmyVAQAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA02SbUhTURiAObt3d3fS2HWaHpWUVmEZlYN+nKDsC+H0p4wgyjAbenGSm7Lr R1aQBhYuy4qWuUqt1JYNcfM7v3BTKc2PzZzimhGak1JLTAhTS7cC/z2c93ne8+elCUklP5BO VKWyapU8SUp5kXUWacguUbUzJnyxRYbMXbUCtNDTDVC5rROgn9o3BBr/5ACovjAOFXf08ZGx 2kGighYThSq0jSTq768SoN7r0wKkd87xkWnczkdzeWN8pFl8RaD52x0AlQ1beciuv8dH81Xj AFm7I5EjW0+h133tFHrfY+OjnJYOAdKYlym0YjeSaKrGH5W9sBPIuIAPBWOtRg+wocgA8PeR HAF+nGUlcYkpDZsqcin80d5M4erSa9g428DD7bPNPJy/HI4XLRtxzdBNEt+pqQB43hQcJY72 2h/PJiWms+o9ERe8FE8HHhEpK0GXTDMlIAu4fDVASENmL3QU20gN8KIlTBOAzvwVwjMIgA+t natMr7IPtFg4jzMDoL1PA9YcH+YM1De1kmvsy2yFVa5RYk0imCEh7B5oEHiKMR4caHC5LYoJ g21TI9Qai5nNcOjXuHuTiImA2sly9zvJbIP1t0rcvHH1B1f9yD/HG74rnHDvETInoa6yzc0E EwqXimyEh/3h6EQxz8MhsH7mCXEX+OjW5bp1iW5doluXlACyAgSwKZwyQcnJUmQqNmM3J1dy aaqE3XHJShNwX1HYjgYwWBprBgwNpBtECm9njIQvT+cylWYAaULqK9pp+RgjEcXLMy+z6uRY dVoSy5lBEE1K/UVfVF1nJUyCPJW9yLIprPr/lEcLA7MAd7WTDI1s7JV9cICj943nlOalxIzP iUcOlEY3FxpP1f5YyN0k3tJrKxrOzhWnCyeXe51f68q2PxCEVH7bp/pjKLihtCWFB58/+HYw 3nxl2i8w7/fxuuXDNt+QrkGtXEHH6LMUL6ljUddaThjqrM+gad4w5ieO7FFhV6s04vlpKckp 5LIwQs3J/wKp7t2aQQMAAA== X-CMS-MailID: 20191126231942epcas1p2017370a78a1fbab9bd1b6dc00b60d4ef X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: SVC_REQ_APPROVE CMS-TYPE: 101P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20191122214539epcas1p34d4ca24634642e8a79c33d7a7c9291ba References: Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 11/27/19 4:44 AM, Rob Herring wrote: > On Sun, Nov 24, 2019 at 4:53 PM Chanwoo Choi wrote: >> >> Hi Leonard, >> >> On 11/23/19 6:45 AM, Leonard Crestez wrote: >>> Add driver for dynamic scaling the DDR Controller on imx8m chips. Actual >>> frequency switching is implemented inside TF-A, this driver wraps the >>> SMC calls and synchronizes the clk tree. >>> >>> The DRAM clocks on imx8m have the following structure (abridged): >>> >>> +----------+ |\ +------+ >>> | dram_pll |-------|M| dram_core | | >>> +----------+ |U|---------->| D | >>> /--|X| | D | >>> dram_alt_root | |/ | R | >>> | | C | >>> +---------+ | | >>> |FIX DIV/4| | | >>> +---------+ | | >>> composite: | | | >>> +----------+ | | | >>> | dram_alt |----/ | | >>> +----------+ | | >>> | dram_apb |-------------------->| | >>> +----------+ +------+ >>> >>> The dram_pll is used for higher rates and dram_alt is used for lower >>> rates. The dram_alt and dram_apb clocks are "imx composite" and their >>> parent can also be modified. >>> >>> This driver will prepare/enable the new parents ahead of switching (so >>> that the expected roots are enabled) and afterwards it will call >>> clk_set_parent to ensure the parents in clock framework are up-to-date. >>> >>> The driver relies on dram_pll dram_alt and dram_apb being marked with >>> CLK_GET_RATE_NOCACHE for rate updates. >>> >>> Signed-off-by: Leonard Crestez >>> Acked-by: Chanwoo Choi >>> --- >>> drivers/devfreq/Kconfig | 9 + >>> drivers/devfreq/Makefile | 1 + >>> drivers/devfreq/imx8m-ddrc.c | 465 +++++++++++++++++++++++++++++++++++ >>> 3 files changed, 475 insertions(+) >>> create mode 100644 drivers/devfreq/imx8m-ddrc.c >>> >>> diff --git a/drivers/devfreq/Kconfig b/drivers/devfreq/Kconfig >>> index 59027d7ddf2a..5eac479dd05f 100644 >>> --- a/drivers/devfreq/Kconfig >>> +++ b/drivers/devfreq/Kconfig >>> @@ -89,10 +89,19 @@ config ARM_EXYNOS_BUS_DEVFREQ >>> Each memory bus group could contain many memoby bus block. It reads >>> PPMU counters of memory controllers by using DEVFREQ-event device >>> and adjusts the operating frequencies and voltages with OPP support. >>> This does not yet operate with optimal voltages. >>> >>> +config ARM_IMX8M_DDRC_DEVFREQ >>> + tristate "i.MX8M DDRC DEVFREQ Driver" >>> + depends on ARCH_MXC && HAVE_ARM_SMCCC >> >> I'll edit it as following and applied it. > > You corrupted the URLs in the binding patch when applying the series: > > Traceback (most recent call last): > File "/usr/local/lib/python3.6/dist-packages/jsonschema/validators.py", > line 774, in resolve_from_url > document = self.store[url] > File "/usr/local/lib/python3.6/dist-packages/jsonschema/_utils.py", > line 22, in __getitem__ > return self.store[self.normalize(uri)] > KeyError: 'https://protect2.fireeye.com/url?k=b51ff83f-e8cff0d7-b51e7370-000babff32e3-c25c03b8af1b12ee&u=http://devicetree.org/meta-schemas/core.yaml' > I'm sorry the url was changed when I applied them because of the internal security system.. I fixed and updated it to devfreq next branch. Thanks, Chanwoo Choi