From: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
To: Alexander Stein <alexander.stein@systec-electronic.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>,
Thomas Gleixner <tglx@linutronix.de>,
Jason Cooper <jason@lakedaemon.net>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [RFC] irqchip: add support for LS1021A external interrupt lines
Date: Mon, 11 Dec 2017 15:06:52 +0100 [thread overview]
Message-ID: <7badefae-a952-7839-0bfe-dcd09ea1204f@prevas.dk> (raw)
In-Reply-To: <42019fb5-393a-08b0-924d-bf1a97e078fe@prevas.dk>
On 2017-12-11 14:45, Rasmus Villemoes wrote:
> On 2017-12-11 11:02, Alexander Stein wrote:
>
>> Oh, and what is the content of register SCFG_SCFGREVCR?
>
> Good point. On my board it's 0xffffffff, set even before U-boot starts,
> and lots board support code in U-boot expects this. I can't immediately
> find examples in the linux source code that actually writes to the scfg,
Not a write, but we do already implicitly assume SCFG_SCFGREVCR is set
to all-ones: In drivers/pci/dwc/pci-layerscape.c, bits which are
numbered 6-11 in the reference manual are extracted with a regmap_read()
followed by a left-shift by 20 and mask with 0x3f. That's consistent
with me setting bit 0 (reference manual enumeration) using 1U<<31.
Rasmus
next prev parent reply other threads:[~2017-12-11 14:06 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <48d2d08c-c57a-ce49-5958-0fd5ad4a2dc7@arm.com>
2017-12-08 14:33 ` [RFC] irqchip: add support for LS1021A external interrupt lines Rasmus Villemoes
[not found] ` <1512743580-15358-1-git-send-email-rasmus.villemoes-rjjw5hvvQKZaa/9Udqfwiw@public.gmane.org>
2017-12-08 15:11 ` Alexander Stein
2017-12-08 16:09 ` Marc Zyngier
2017-12-11 9:08 ` Rasmus Villemoes
[not found] ` <58297576-cc32-819d-c6b3-7d1355095482-rjjw5hvvQKZaa/9Udqfwiw@public.gmane.org>
2017-12-11 9:45 ` Alexander Stein
2017-12-11 10:02 ` Alexander Stein
2017-12-11 13:45 ` Rasmus Villemoes
2017-12-11 14:06 ` Rasmus Villemoes [this message]
[not found] ` <7badefae-a952-7839-0bfe-dcd09ea1204f-rjjw5hvvQKZaa/9Udqfwiw@public.gmane.org>
2017-12-11 14:38 ` Alexander Stein
2017-12-08 16:02 ` Marc Zyngier
[not found] ` <da843420-cede-e787-838d-1fd48e3ca7dd-5wv7dgnIgG8@public.gmane.org>
2017-12-11 9:30 ` Rasmus Villemoes
[not found] ` <563e0aaa-faf9-ae6a-ccd4-2aa89d7e457b-rjjw5hvvQKZaa/9Udqfwiw@public.gmane.org>
2017-12-11 18:29 ` Marc Zyngier
2017-12-12 23:28 ` Rob Herring
2017-12-15 22:55 ` Rasmus Villemoes
[not found] ` <62c4af0c-ffe5-23c9-9ef6-2e4b8ab90050-rjjw5hvvQKZaa/9Udqfwiw@public.gmane.org>
2017-12-21 22:45 ` Rob Herring
[not found] ` <1513758631-19909-1-git-send-email-rasmus.villemoes@prevas.dk>
[not found] ` <1513758631-19909-1-git-send-email-rasmus.villemoes-rjjw5hvvQKZaa/9Udqfwiw@public.gmane.org>
2017-12-20 8:30 ` [PATCH v2 2/2] dt/bindings: Add bindings for Layerscape external irqs Rasmus Villemoes
[not found] ` <1513758631-19909-2-git-send-email-rasmus.villemoes-rjjw5hvvQKZaa/9Udqfwiw@public.gmane.org>
2017-12-21 22:44 ` Rob Herring
[not found] ` <20180122092133.23177-1-rasmus.villemoes@prevas.dk>
2018-01-22 9:21 ` [PATCH v3 " Rasmus Villemoes
2018-01-24 15:28 ` Marc Zyngier
[not found] ` <20180125150230.7234-1-rasmus.villemoes@prevas.dk>
[not found] ` <20180125150230.7234-1-rasmus.villemoes-rjjw5hvvQKZaa/9Udqfwiw@public.gmane.org>
2018-01-25 15:02 ` [PATCH v4 " Rasmus Villemoes
[not found] ` <20180125150230.7234-2-rasmus.villemoes-rjjw5hvvQKZaa/9Udqfwiw@public.gmane.org>
2018-02-05 6:07 ` Rob Herring
2018-02-08 15:08 ` Rasmus Villemoes
[not found] ` <15ac0da3-e85b-c6be-366a-368934752018-rjjw5hvvQKZaa/9Udqfwiw@public.gmane.org>
2018-02-09 9:47 ` Marc Zyngier
[not found] ` <20180223210901.23480-1-rasmus.villemoes@prevas.dk>
2018-02-23 21:09 ` [PATCH v5 " Rasmus Villemoes
2018-03-02 19:49 ` Rob Herring
2018-05-04 8:07 ` Rasmus Villemoes
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