From: Greentime Hu <green.hu-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: greentime-MUIXKm3Oiri1Z/+hSey0Gg@public.gmane.org,
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Cc: green.hu-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
Vincent Chen <vincentc-MUIXKm3Oiri1Z/+hSey0Gg@public.gmane.org>
Subject: [PATCH v3 12/33] nds32: Atomic operations
Date: Fri, 8 Dec 2017 17:11:55 +0800 [thread overview]
Message-ID: <803a7060a80494e05dbb1511d99ba793aa3145b9.1512723245.git.green.hu@gmail.com> (raw)
In-Reply-To: <cover.1512723245.git.green.hu-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
In-Reply-To: <cover.1512723245.git.green.hu-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Greentime Hu <greentime-MUIXKm3Oiri1Z/+hSey0Gg@public.gmane.org>
This patch includes the atomic and futex operations. Many atomic operations use
the load-lock word(llw) and store-condition word(scw) operations.
Signed-off-by: Vincent Chen <vincentc-MUIXKm3Oiri1Z/+hSey0Gg@public.gmane.org>
Signed-off-by: Greentime Hu <greentime-MUIXKm3Oiri1Z/+hSey0Gg@public.gmane.org>
---
arch/nds32/include/asm/barrier.h | 28 +++++++++
arch/nds32/include/asm/futex.h | 116 ++++++++++++++++++++++++++++++++++++++
2 files changed, 144 insertions(+)
create mode 100644 arch/nds32/include/asm/barrier.h
create mode 100644 arch/nds32/include/asm/futex.h
diff --git a/arch/nds32/include/asm/barrier.h b/arch/nds32/include/asm/barrier.h
new file mode 100644
index 0000000..d325a78
--- /dev/null
+++ b/arch/nds32/include/asm/barrier.h
@@ -0,0 +1,28 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __NDS32_ASM_BARRIER_H
+#define __NDS32_ASM_BARRIER_H
+
+#ifndef __ASSEMBLY__
+#define mb() asm volatile("msync all":::"memory")
+#define rmb() asm volatile("msync all":::"memory")
+#define wmb() asm volatile("msync store":::"memory")
+#include <asm-generic/barrier.h>
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* __NDS32_ASM_BARRIER_H */
diff --git a/arch/nds32/include/asm/futex.h b/arch/nds32/include/asm/futex.h
new file mode 100644
index 0000000..5aa107c
--- /dev/null
+++ b/arch/nds32/include/asm/futex.h
@@ -0,0 +1,116 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __NDS32_FUTEX_H__
+#define __NDS32_FUTEX_H__
+
+#include <linux/futex.h>
+#include <linux/uaccess.h>
+#include <asm/errno.h>
+
+#define __futex_atomic_ex_table(err_reg) \
+ " .pushsection __ex_table,\"a\"\n" \
+ " .align 3\n" \
+ " .long 1b, 4f\n" \
+ " .long 2b, 4f\n" \
+ " .popsection\n" \
+ " .pushsection .fixup,\"ax\"\n" \
+ "4: move %0, " err_reg "\n" \
+ " j 3b\n" \
+ " .popsection"
+
+#define __futex_atomic_op(insn, ret, oldval, tmp, uaddr, oparg) \
+ smp_mb(); \
+ asm volatile( \
+ " movi $ta, #0\n" \
+ "1: llw %1, [%2+$ta]\n" \
+ " " insn "\n" \
+ "2: scw %0, [%2+$ta]\n" \
+ " beqz %0, 1b\n" \
+ " movi %0, #0\n" \
+ "3:\n" \
+ __futex_atomic_ex_table("%4") \
+ : "=&r" (ret), "=&r" (oldval) \
+ : "r" (uaddr), "r" (oparg), "i" (-EFAULT) \
+ : "cc", "memory")
+static inline int
+futex_atomic_cmpxchg_inatomic(u32 * uval, u32 __user * uaddr,
+ u32 oldval, u32 newval)
+{
+ int ret = 0;
+ u32 val, tmp, flags;
+
+ if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
+ return -EFAULT;
+
+ smp_mb();
+ asm volatile (" movi $ta, #0\n"
+ "1: llw %1, [%6 + $ta]\n"
+ " sub %3, %1, %4\n"
+ " cmovz %2, %5, %3\n"
+ " cmovn %2, %1, %3\n"
+ "2: scw %2, [%6 + $ta]\n"
+ " beqz %2, 1b\n"
+ "3:\n " __futex_atomic_ex_table("%7")
+ :"+&r"(ret), "=&r"(val), "=&r"(tmp), "=&r"(flags)
+ :"r"(oldval), "r"(newval), "r"(uaddr), "i"(-EFAULT)
+ :"$ta", "memory");
+ smp_mb();
+
+ *uval = val;
+ return ret;
+}
+
+static inline int
+arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr)
+{
+ int oldval = 0, ret;
+
+
+ pagefault_disable();
+ switch (op) {
+ case FUTEX_OP_SET:
+ __futex_atomic_op("move %0, %3", ret, oldval, tmp, uaddr,
+ oparg);
+ break;
+ case FUTEX_OP_ADD:
+ __futex_atomic_op("add %0, %1, %3", ret, oldval, tmp, uaddr,
+ oparg);
+ break;
+ case FUTEX_OP_OR:
+ __futex_atomic_op("or %0, %1, %3", ret, oldval, tmp, uaddr,
+ oparg);
+ break;
+ case FUTEX_OP_ANDN:
+ __futex_atomic_op("and %0, %1, %3", ret, oldval, tmp, uaddr,
+ ~oparg);
+ break;
+ case FUTEX_OP_XOR:
+ __futex_atomic_op("xor %0, %1, %3", ret, oldval, tmp, uaddr,
+ oparg);
+ break;
+ default:
+ ret = -ENOSYS;
+ }
+
+ pagefault_enable();
+
+ if (!ret)
+ *oval = oldval;
+
+ return ret;
+}
+#endif /* __NDS32_FUTEX_H__ */
--
1.7.9.5
--
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next prev parent reply other threads:[~2017-12-08 9:11 UTC|newest]
Thread overview: 62+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-12-08 9:11 [PATCH v3 00/33] Andes(nds32) Linux Kernel Port Greentime Hu
2017-12-08 9:11 ` [PATCH v3 01/33] asm-generic/io.h: move ioremap_nocache/ioremap_uc/ioremap_wc/ioremap_wt out of ifndef CONFIG_MMU Greentime Hu
2017-12-08 9:11 ` [PATCH v3 02/33] earlycon: add reg-offset to physical address before mapping Greentime Hu
2017-12-08 9:11 ` [PATCH v3 04/33] nds32: Kernel booting and initialization Greentime Hu
2017-12-08 13:19 ` Philippe Ombredanne
2017-12-08 13:25 ` Greentime Hu
2017-12-08 9:11 ` [PATCH v3 05/33] nds32: Exception handling Greentime Hu
2017-12-08 15:05 ` Al Viro
2017-12-08 9:11 ` [PATCH v3 06/33] nds32: MMU definitions Greentime Hu
[not found] ` <cover.1512723245.git.green.hu-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2017-12-08 9:11 ` [PATCH v3 03/33] nds32: Assembly macros and definitions Greentime Hu
2017-12-08 9:11 ` [PATCH v3 07/33] nds32: MMU initialization Greentime Hu
2017-12-18 9:08 ` Guo Ren
2017-12-18 11:21 ` Greentime Hu
2017-12-18 12:22 ` Guo Ren
2017-12-19 6:56 ` Greentime Hu
2017-12-08 9:11 ` Greentime Hu [this message]
2017-12-08 9:11 ` [PATCH v3 13/33] nds32: Device specific operations Greentime Hu
2017-12-08 9:12 ` [PATCH v3 19/33] nds32: Library functions Greentime Hu
2017-12-08 9:12 ` [PATCH v3 32/33] irqchip: Andestech Internal Vector Interrupt Controller driver Greentime Hu
[not found] ` <4fb7bd1cd2619287061fd68a38a774c8aef7dbe9.1512723245.git.green.hu-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2017-12-11 9:16 ` Marc Zyngier
2017-12-08 9:11 ` [PATCH v3 08/33] nds32: MMU fault handling and page table management Greentime Hu
2017-12-08 9:11 ` [PATCH v3 09/33] nds32: Cache and TLB routines Greentime Hu
2017-12-13 2:16 ` Guo Ren
2017-12-13 5:45 ` Greentime Hu
[not found] ` <CAEbi=3dtcnUNbd4SoueUnoYvRWot9fA1n62t0b4PWx1UYs2jZA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-12-13 8:19 ` Guo Ren
2017-12-13 8:30 ` Greentime Hu
[not found] ` <CAEbi=3eKH5JESwtadq4LKF3ZvmBi1QwUWpCTb0btierBST_cRQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-12-13 8:53 ` Guo Ren
2017-12-13 9:03 ` Greentime Hu
[not found] ` <CAEbi=3fvdWMExreVsSu3TJqXUr5Zpt4k_q=cXXB3miJCvY-+1g-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-12-13 9:45 ` Guo Ren
2017-12-13 10:04 ` Greentime Hu
2017-12-08 9:11 ` [PATCH v3 10/33] nds32: Process management Greentime Hu
2017-12-08 9:11 ` [PATCH v3 11/33] nds32: IRQ handling Greentime Hu
2017-12-08 9:11 ` [PATCH v3 14/33] nds32: DMA mapping API Greentime Hu
2017-12-08 9:11 ` [PATCH v3 15/33] nds32: ELF definitions Greentime Hu
2017-12-08 9:11 ` [PATCH v3 16/33] nds32: System calls handling Greentime Hu
2017-12-08 9:12 ` [PATCH v3 17/33] nds32: VDSO support Greentime Hu
2017-12-08 10:21 ` Mark Rutland
2017-12-08 11:54 ` Greentime Hu
2017-12-08 12:14 ` Mark Rutland
2017-12-12 1:58 ` Vincent Chen
2017-12-08 12:29 ` Marc Zyngier
[not found] ` <f58c7052-c2fe-5704-a03b-41bf2e3b20b9-5wv7dgnIgG8@public.gmane.org>
2017-12-08 12:46 ` Greentime Hu
2017-12-08 9:12 ` [PATCH v3 18/33] nds32: Signal handling support Greentime Hu
2017-12-08 9:12 ` [PATCH v3 20/33] nds32: Debugging support Greentime Hu
2017-12-08 9:12 ` [PATCH v3 21/33] nds32: L2 cache support Greentime Hu
2017-12-08 9:12 ` [PATCH v3 22/33] nds32: Loadable modules Greentime Hu
2017-12-08 9:12 ` [PATCH v3 23/33] nds32: Generic timers support Greentime Hu
2017-12-08 13:43 ` Linus Walleij
2017-12-08 9:12 ` [PATCH v3 24/33] nds32: Device tree support Greentime Hu
2017-12-08 10:23 ` Mark Rutland
2017-12-08 10:27 ` Mark Rutland
2017-12-08 9:12 ` [PATCH v3 25/33] nds32: Miscellaneous header files Greentime Hu
2017-12-08 9:12 ` [PATCH v3 26/33] nds32: defconfig Greentime Hu
2017-12-08 9:12 ` [PATCH v3 27/33] nds32: Build infrastructure Greentime Hu
2017-12-08 9:12 ` [PATCH v3 28/33] MAINTAINERS: Add nds32 Greentime Hu
2017-12-08 9:12 ` [PATCH v3 29/33] dt-bindings: nds32 CPU Bindings Greentime Hu
2017-12-12 20:10 ` Rob Herring
2017-12-08 9:12 ` [PATCH v3 30/33] dt-bindings: nds32 SoC Bindings Greentime Hu
2017-12-12 20:12 ` Rob Herring
2017-12-08 9:12 ` [PATCH v3 31/33] dt-bindings: interrupt-controller: Andestech Internal Vector Interrupt Controller Greentime Hu
[not found] ` <a0bb0a384a74bc180c0d4e9aa5741bb52653211b.1512723245.git.green.hu-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2017-12-12 17:33 ` Rob Herring
2017-12-08 9:12 ` [PATCH v3 33/33] net: faraday add nds32 support Greentime Hu
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