From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.0 required=3.0 tests=BAYES_00,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 80CB9C433DB for ; Sun, 3 Jan 2021 12:17:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 40B172080D for ; Sun, 3 Jan 2021 12:17:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726573AbhACMRR (ORCPT ); Sun, 3 Jan 2021 07:17:17 -0500 Received: from mail.kernel.org ([198.145.29.99]:49208 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726427AbhACMRR (ORCPT ); Sun, 3 Jan 2021 07:17:17 -0500 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 635882080D; Sun, 3 Jan 2021 12:16:36 +0000 (UTC) Received: from 78.163-31-62.static.virginmediabusiness.co.uk ([62.31.163.78] helo=wait-a-minute.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94) (envelope-from ) id 1kw2JG-00546E-1A; Sun, 03 Jan 2021 12:16:34 +0000 Date: Sun, 03 Jan 2021 12:16:31 +0000 Message-ID: <874kjykyg0.wl-maz@kernel.org> From: Marc Zyngier To: Samuel Holland Cc: Thomas Gleixner , Rob Herring , Maxime Ripard , Chen-Yu Tsai , Jernej Skrabec , Russell King , Catalin Marinas , Will Deacon , Ondrej Jirman , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v3 00/10] sunxi: Support IRQ wakeup from deep sleep In-Reply-To: <20210103103101.33603-1-samuel@sholland.org> References: <20210103103101.33603-1-samuel@sholland.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 62.31.163.78 X-SA-Exim-Rcpt-To: samuel@sholland.org, tglx@linutronix.de, robh+dt@kernel.org, mripard@kernel.org, wens@csie.org, jernej.skrabec@siol.net, linux@armlinux.org.uk, catalin.marinas@arm.com, will@kernel.org, megous@megous.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org [dropped linux-sunxi@googlegroups.com, which seems to be a closed ML] On Sun, 03 Jan 2021 10:30:51 +0000, Samuel Holland wrote: > > Allwinner sun6i/sun8i/sun50i SoCs (A31 and newer) have two interrupt > controllers: GIC and R_INTC. GIC does not support wakeup. R_INTC handles > the external NMI pin, and provides 32+ IRQs to the ARISC. The first 16 > of these correspond 1:1 to a block of GIC IRQs starting with the NMI. > The last 13-16 multiplex the first (up to) 128 GIC SPIs. > > This series replaces the existing chained irqchip driver that could only > control the NMI, with a stacked irqchip driver that also provides wakeup > capability for those multiplexed SPI IRQs. The idea is to preconfigure > the ARISC's IRQ controller, and then the ARISC firmware knows to wake up > as soon as it receives an IRQ. It can also decide how deep it can > suspend based on the selected wakeup IRQs. Out of curiosity, how do you plan to communicate dynamic configuration of IRQs to the ARISC? We recently went through this with some TI stuff, and the result a bit awkward (the arm64 side configures interrupts that are not visible to the kernel, but only to the co-processors). I wondered whether you had other ideas... Thanks, M. -- Without deviation from the norm, progress is not possible.