From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.3 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING, NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B8BCBC433ED for ; Fri, 2 Apr 2021 01:45:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 795CE610CE for ; Fri, 2 Apr 2021 01:45:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233870AbhDBBpP (ORCPT ); Thu, 1 Apr 2021 21:45:15 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:15587 "EHLO szxga04-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231179AbhDBBpP (ORCPT ); Thu, 1 Apr 2021 21:45:15 -0400 Received: from DGGEMS413-HUB.china.huawei.com (unknown [172.30.72.59]) by szxga04-in.huawei.com (SkyGuard) with ESMTP id 4FBN9P0psmz1BFlH; Fri, 2 Apr 2021 09:43:05 +0800 (CST) Received: from [127.0.0.1] (10.40.188.87) by DGGEMS413-HUB.china.huawei.com (10.3.19.213) with Microsoft SMTP Server id 14.3.498.0; Fri, 2 Apr 2021 09:45:02 +0800 Subject: Re: [PATCH v14 10/10] iommu/arm-smmu-v3: Add stall support for platform devices To: Will Deacon , Jean-Philippe Brucker References: <20210401154718.307519-1-jean-philippe@linaro.org> <20210401154718.307519-11-jean-philippe@linaro.org> <20210401171101.GB9447@willie-the-truck> CC: , , , , , , , , , , , , , , From: Zhou Wang Message-ID: <8e55e807-69f2-6492-e4a0-0dd9250142bc@hisilicon.com> Date: Fri, 2 Apr 2021 09:45:01 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:45.0) Gecko/20100101 Thunderbird/45.7.1 MIME-Version: 1.0 In-Reply-To: <20210401171101.GB9447@willie-the-truck> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-Originating-IP: [10.40.188.87] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 2021/4/2 1:11, Will Deacon wrote: > On Thu, Apr 01, 2021 at 05:47:19PM +0200, Jean-Philippe Brucker wrote: >> The SMMU provides a Stall model for handling page faults in platform >> devices. It is similar to PCIe PRI, but doesn't require devices to have >> their own translation cache. Instead, faulting transactions are parked >> and the OS is given a chance to fix the page tables and retry the >> transaction. >> >> Enable stall for devices that support it (opt-in by firmware). When an >> event corresponds to a translation error, call the IOMMU fault handler. >> If the fault is recoverable, it will call us back to terminate or >> continue the stall. > > Which hardware is this useful for? Stalling adds a fair amount of complexity > to the driver, so I don't think we should support it unless we're likely to > see platforms that both implement it and do something useful with it. Hi Will， HiSilicon Kunpeng920's ZIP/SEC/HPRE engines(drivers/crypto/hisilicon/) are using stall mode. UACCE driver(drivers/misc/uacce/) is used to export these engines to user space. A user space library: https://github.com/Linaro/uadk offers APIs to help users to use these engines. In fact, we only need a quirk(https://lkml.org/lkml/2021/3/8/1506) based on this IOPF series to make whole solution mainline ready. So please also take this patch, we need it! :) Best, Zhou > > Will > > . >