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[89.6.132.55]) by smtp.gmail.com with ESMTPSA id g16sm7692559wro.63.2021.08.05.08.44.42 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 05 Aug 2021 08:44:43 -0700 (PDT) Subject: Re: [v6 2/2] arm64: dts: mediatek: Correct UART0 bus clock of MT8192 To: Chun-Jie Chen , Ikjoon Jang Cc: Rob Herring , Nicolas Boichat , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , "moderated list:ARM/Mediatek SoC support" , open list , "moderated list:ARM/Mediatek SoC support" , srv_heupstream , Project_Global_Chrome_Upstream_Group References: <20210727023205.20319-1-chun-jie.chen@mediatek.com> <20210727023205.20319-3-chun-jie.chen@mediatek.com> From: Matthias Brugger Message-ID: <913973ef-e3ee-5015-a010-b436fe620e1c@gmail.com> Date: Thu, 5 Aug 2021 17:44:42 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.12.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 30/07/2021 04:43, Chun-Jie Chen wrote: > On Wed, 2021-07-28 at 14:14 +0800, Ikjoon Jang wrote: >> Hi, >> >> On Tue, Jul 27, 2021 at 10:43 AM Chun-Jie Chen >> wrote: >>> >>> infra_uart0 clock is the real one what uart0 uses as bus clock. >>> >>> Signed-off-by: Weiyi Lu >>> Signed-off-by: Chun-Jie Chen >>> --- >>> arch/arm64/boot/dts/mediatek/mt8192.dtsi | 2 +- >>> 1 file changed, 1 insertion(+), 1 deletion(-) >>> >>> diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi >>> b/arch/arm64/boot/dts/mediatek/mt8192.dtsi >>> index c7c7d4e017ae..9810f1d441da 100644 >>> --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi >>> +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi >>> @@ -327,7 +327,7 @@ >>> "mediatek,mt6577-uart"; >>> reg = <0 0x11002000 0 0x1000>; >>> interrupts = >> IRQ_TYPE_LEVEL_HIGH 0>; >>> - clocks = <&clk26m>, <&clk26m>; >>> + clocks = <&clk26m>, <&infracfg >>> CLK_INFRA_UART0>; >>> clock-names = "baud", "bus"; >>> status = "disabled"; >>> }; >> >> There're many other nodes still having only clk26m. Will you update >> them too? >> > > Others will be updated by IP owner. > As it seems we will have some time before this can be merged, could you help work with the other IP owners to get one big patch that updates all clocks? Thanks a lot, Matthias > Best Regards, > Chun-Jie > >>> -- >>> 2.18.0 >>> _______________________________________________ >>> Linux-mediatek mailing list >>> Linux-mediatek@lists.infradead.org >>> > https://urldefense.com/v3/__http://lists.infradead.org/mailman/listinfo/linux-mediatek__;!!CTRNKA9wMg0ARbw!1bIz6X2EiFbigCImzQmbqtezIFfl1LRBuPOYTqBdl5wfx8b-zp0zQP68R7RhaIcAAXXF$ >>>