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charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Wed, Sep 9, 2020 at 9:56 PM Robert Marko wrote: > > 8devices Jalapeno is a dual-band SoM, based on Qualcomm > IPQ4018 + QCA8072 platform. > > Specification: > QCA IPQ4018, Quad core ARM v7 Cortex A7 717MHz > 256 MB of DDR3 RAM > 8 MB of SPI NOR flash > 128 MB of Winbond SPI NAND flash > WLAN1: Qualcomm Atheros QCA4018 2.4GHz 802.11bgn 2:2x2 > WLAN2: Qualcomm Atheros QCA4018 5GHz 802.11a/n/ac 2:2x2 > ETH: Qualcomm Atheros QCA8072 Gigabit Switch (1 x LAN, 1 x WAN) > > Signed-off-by: Robert Marko > Cc: Luka Perkov > --- > Changes since v1: > * Drop include that does not exist > > arch/arm/boot/dts/Makefile | 1 + > arch/arm/boot/dts/qcom-ipq4018-jalapeno.dts | 214 ++++++++++++++++++++ > 2 files changed, 215 insertions(+) > create mode 100644 arch/arm/boot/dts/qcom-ipq4018-jalapeno.dts > > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile > index 4572db3fa5ae..9b474208057d 100644 > --- a/arch/arm/boot/dts/Makefile > +++ b/arch/arm/boot/dts/Makefile > @@ -890,6 +890,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \ > qcom-apq8074-dragonboard.dtb \ > qcom-apq8084-ifc6540.dtb \ > qcom-apq8084-mtp.dtb \ > + qcom-ipq4018-jalapeno.dtb \ > qcom-ipq4019-ap.dk01.1-c1.dtb \ > qcom-ipq4019-ap.dk04.1-c1.dtb \ > qcom-ipq4019-ap.dk04.1-c3.dtb \ > diff --git a/arch/arm/boot/dts/qcom-ipq4018-jalapeno.dts b/arch/arm/boot/dts/qcom-ipq4018-jalapeno.dts > new file mode 100644 > index 000000000000..394412619894 > --- /dev/null > +++ b/arch/arm/boot/dts/qcom-ipq4018-jalapeno.dts > @@ -0,0 +1,214 @@ > +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT > +// Copyright (c) 2018, Robert Marko > + > +#include "qcom-ipq4019.dtsi" > +#include > +#include > + > +/ { > + model = "8devices Jalapeno"; > + compatible = "8dev,jalapeno"; > +}; > + > +&tlmm { > + mdio_pins: mdio_pinmux { > + pinmux_1 { > + pins = "gpio53"; > + function = "mdio"; > + }; > + > + pinmux_2 { > + pins = "gpio52"; > + function = "mdc"; > + }; > + > + pinconf { > + pins = "gpio52", "gpio53"; > + bias-pull-up; > + }; > + }; > + > + serial_pins: serial_pinmux { > + mux { > + pins = "gpio60", "gpio61"; > + function = "blsp_uart0"; > + bias-disable; > + }; > + }; > + > + spi_0_pins: spi_0_pinmux { > + pin { > + function = "blsp_spi0"; > + pins = "gpio55", "gpio56", "gpio57"; > + drive-strength = <2>; > + bias-disable; > + }; > + > + pin_cs { > + function = "gpio"; > + pins = "gpio54", "gpio59"; > + drive-strength = <2>; > + bias-disable; > + output-high; > + }; > + }; > +}; > + > +&watchdog { > + status = "okay"; > +}; > + > +&prng { > + status = "okay"; > +}; > + > +&blsp_dma { > + status = "okay"; > +}; > + > +&blsp1_spi1 { > + status = "okay"; > + > + pinctrl-0 = <&spi_0_pins>; > + pinctrl-names = "default"; > + cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 59 GPIO_ACTIVE_HIGH>; > + > + flash@0 { > + status = "okay"; > + > + compatible = "jedec,spi-nor"; > + reg = <0>; > + spi-max-frequency = <24000000>; > + > + partitions { > + compatible = "fixed-partitions"; > + #address-cells = <1>; > + #size-cells = <1>; > + > + partition@0 { > + label = "SBL1"; > + reg = <0x00000000 0x00040000>; > + read-only; > + }; > + > + partition@40000 { > + label = "MIBIB"; > + reg = <0x00040000 0x00020000>; > + read-only; > + }; > + > + partition@60000 { > + label = "QSEE"; > + reg = <0x00060000 0x00060000>; > + read-only; > + }; > + > + partition@c0000 { > + label = "CDT"; > + reg = <0x000c0000 0x00010000>; > + read-only; > + }; > + > + partition@d0000 { > + label = "DDRPARAMS"; > + reg = <0x000d0000 0x00010000>; > + read-only; > + }; > + > + partition@e0000 { > + label = "u-boot-env"; > + reg = <0x000e0000 0x00010000>; > + }; > + > + partition@f0000 { > + label = "u-boot"; > + reg = <0x000f0000 0x00080000>; > + read-only; > + }; > + > + partition@170000 { > + label = "ART"; > + reg = <0x00170000 0x00010000>; > + read-only; > + }; > + }; > + }; > + > + spi-nand@1 { > + status = "okay"; > + > + compatible = "spi-nand"; > + reg = <1>; > + spi-max-frequency = <24000000>; > + > + partitions { > + compatible = "fixed-partitions"; > + #address-cells = <1>; > + #size-cells = <1>; > + > + partition@0 { > + label = "ubi1"; > + reg = <0x00000000 0x04000000>; > + }; > + > + partition@4000000 { > + label = "ubi2"; > + reg = <0x04000000 0x04000000>; > + }; > + }; > + }; > +}; > + > +&blsp1_uart1 { > + status = "okay"; > + > + pinctrl-0 = <&serial_pins>; > + pinctrl-names = "default"; > +}; > + > +&cryptobam { > + status = "okay"; > +}; > + > +&crypto { > + status = "okay"; > +}; > + > +&mdio { > + status = "okay"; > + > + pinctrl-0 = <&mdio_pins>; > + pinctrl-names = "default"; > +}; > + > +&wifi0 { > + status = "okay"; > + > + qcom,ath10k-calibration-variant = "8devices-Jalapeno"; > +}; > + > +&wifi1 { > + status = "okay"; > + > + qcom,ath10k-calibration-variant = "8devices-Jalapeno"; > +}; > + > +&usb3_ss_phy { > + status = "okay"; > +}; > + > +&usb3_hs_phy { > + status = "okay"; > +}; > + > +&usb3 { > + status = "okay"; > +}; > + > +&usb2_hs_phy { > + status = "okay"; > +}; > + > +&usb2 { > + status = "okay"; > +}; > -- > 2.26.2 > Hi, Is there an issue with the patch preventing the review? Regards, Robert