From mboxrd@z Thu Jan 1 00:00:00 1970 From: Benjamin Gaignard Subject: Re: [PATCH v6 6/9] dt-bindings: counter: Document stm32 quadrature encoder Date: Mon, 4 Jun 2018 15:03:51 +0200 Message-ID: References: <20180518162815.GA24966@rob-hp-laptop> Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Return-path: In-Reply-To: <20180518162815.GA24966@rob-hp-laptop> Sender: linux-kernel-owner@vger.kernel.org To: Rob Herring Cc: William Breathitt Gray , Mark Rutland , devicetree@vger.kernel.org, Benjamin Gaignard , linux-iio@vger.kernel.org, "linux-kernel@vger.kernel.org" , "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" , Fabrice Gasnier , Jonathan Cameron List-Id: devicetree@vger.kernel.org 2018-05-18 18:28 GMT+02:00 Rob Herring : > On Thu, May 17, 2018 at 08:59:40PM +0200, Benjamin Gaignard wrote: >> 2018-05-17 18:23 GMT+02:00 Rob Herring : >> > On Wed, May 16, 2018 at 12:51 PM, William Breathitt Gray >> > wrote: >> >> From: Benjamin Gaignard >> > >> > v6? Where's v1-v5? >> > >> >> Add bindings for STM32 Timer quadrature encoder. >> >> It is a sub-node of STM32 Timer which implement the >> >> counter part of the hardware. >> >> >> >> Cc: Rob Herring >> >> Cc: Mark Rutland >> >> Signed-off-by: Benjamin Gaignard >> >> Signed-off-by: William Breathitt Gray >> >> --- >> >> .../bindings/counter/stm32-timer-cnt.txt | 26 +++++++++++++++++= ++ >> >> .../devicetree/bindings/mfd/stm32-timers.txt | 7 +++++ >> >> 2 files changed, 33 insertions(+) >> >> create mode 100644 Documentation/devicetree/bindings/counter/stm32-t= imer-cnt.txt >> >> >> >> diff --git a/Documentation/devicetree/bindings/counter/stm32-timer-cn= t.txt b/Documentation/devicetree/bindings/counter/stm32-timer-cnt.txt >> >> new file mode 100644 >> >> index 000000000000..377728128bef >> >> --- /dev/null >> >> +++ b/Documentation/devicetree/bindings/counter/stm32-timer-cnt.txt >> >> @@ -0,0 +1,26 @@ >> >> +STMicroelectronics STM32 Timer quadrature encoder >> >> + >> >> +STM32 Timer provides quadrature encoder counter mode to detect >> > >> > 'mode' does not sound like a sub-block of the timers block. >> >> quadrature encoding is one of the counting modes of this hardware >> block which is enable to count on other signals/triggers > > You don't need a child node and compatible to set a mode. "mode" isn't the good word here because quadratic encoder enable a sub-block of this hardware. Timer internal counter input could be internal or external clocks, some IIO triggers or the output of the quadratic encoder sub-block. It is a child like pwm or IIO trigger. > >> >> +angular position and direction of rotary elements, >> >> +from IN1 and IN2 input signals. >> >> + >> >> +Must be a sub-node of an STM32 Timer device tree node. >> >> +See ../mfd/stm32-timers.txt for details about the parent node. >> >> + >> >> +Required properties: >> >> +- compatible: Must be "st,stm32-timer-counter". >> >> +- pinctrl-names: Set to "default". >> >> +- pinctrl-0: List of phandles pointing to pin configuratio= n nodes, >> >> + to set IN1/IN2 pins in mode of operation for = Low-Power >> >> + Timer input on external pin. >> >> + >> >> +Example: >> >> + timers@40010000 { >> >> + compatible =3D "st,stm32-timers"; >> >> + ... >> >> + counter { >> >> + compatible =3D "st,stm32-timer-counter"; >> > >> > Is there only 1? How is the counter addressed? >> >> Yes there is only one counter per hardware block. >> Counter is addressed like the two others sub-nodes and the details >> about parent mode are describe in stm32-timers.txt >> Should I add them here too ? so example will be like that: > > No, you should drop the child node and add pinctrl to the parent. > > Any other functions this block has that you plan on adding? Please make > bindings as complete as possible, not what you currently have drivers > for. Counter framework didn't exist when I pushed timer node but thanks to William's effort it will allow us to use this kindf of hardware Benjamin > >> timers@40010000 { >> #address-cells =3D <1>; >> #size-cells =3D <0>; >> compatible =3D "st,stm32-timers"; >> reg =3D <0x40010000 0x400>; >> clocks =3D <&rcc 0 160>; >> clock-names =3D "int"; >> counter { >> compatible =3D "st,stm32-timer-counter"; >> pinctrl-names =3D "default"; >> pinctrl-0 =3D <&tim1_in_pins>; >> }; >> }; >> >> Benjamin >> > >> > _______________________________________________ >> > linux-arm-kernel mailing list >> > linux-arm-kernel@lists.infradead.org >> > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel --=20 Benjamin Gaignard Graphic Study Group Linaro.org =E2=94=82 Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog