From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AE9C4C433DB for ; Mon, 28 Dec 2020 12:11:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 83609207D1 for ; Mon, 28 Dec 2020 12:11:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727661AbgL1MLG (ORCPT ); Mon, 28 Dec 2020 07:11:06 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40024 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727630AbgL1MLF (ORCPT ); Mon, 28 Dec 2020 07:11:05 -0500 Received: from mail-lf1-x12e.google.com (mail-lf1-x12e.google.com [IPv6:2a00:1450:4864:20::12e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E4747C061794 for ; Mon, 28 Dec 2020 04:10:24 -0800 (PST) Received: by mail-lf1-x12e.google.com with SMTP id l11so23489859lfg.0 for ; Mon, 28 Dec 2020 04:10:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=brainfault-org.20150623.gappssmtp.com; s=20150623; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=/CNl1Zloh38hdZAZsu4K+FQB/bznGk06X5Zsg3eIrkw=; b=b3NQbMhT5B2DqPa8IiUyzriJvp6Wax4e6vSaXiGNGGcMlEOb0FOIQd5dVbC7f1s8iz xHTGjA5ZJYKMeI9BAKtMOeBIdqjelbJdAWYHVapSz2o10TLEh7d91t7AcjETdi5mE2zb YCn6JQao1Mb6yk4qyeUM7ix/nQ+mYqiUrf8q1pAo/O3ixRu3M4p6vHmoRJ1GnvCu6gUG 3QUpI2ZlqiywDblEYjNS9VM23T2y4H8rGdyRdFWMm2cAFEGhRyMJ6j7GApZkgUupeiil OXaMc89ObpweSC8AL5JyyI9nqT8HZ5L8OrcKP7j3Hf+hH9nyZ6lmma0SnFSQ37f0hr3i CrfA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=/CNl1Zloh38hdZAZsu4K+FQB/bznGk06X5Zsg3eIrkw=; b=Y3Sr4ZPvkzLsmuZ5Cq8Jr3W0M31GBLgv+OwRLSUIeDb+ODvvJXj8RtweW1yEUBdAi3 bfPB7t0YbJRlkHhegpqdspLy9YHE6FRqGkkDb0Cs7FtiGvhPrnp+ZK8eJkDvO3xqFoSl aX0PllolhCdIR1zDR6PUlMlSxJXpnGwwMaEbUh8kb/FBAbqIMnBY8QDjL+1+JWn65iCV +JU4ahwRm+qH+nmoQnJXRRKmw6qogQ/48RMq6dtcCDFo7z1+D84AbPFmKdSM2vVmJeCu Ph/U3AfcONObGWmCN+YlSIn5glk9qdvR9Q1LYcLAaiUaonzYZfRnq48Ol+vIwZvGupG3 kxhQ== X-Gm-Message-State: AOAM5302Jy0WP0iNkqFIMuNUEP5fWHpaN+boWnNSHvucHhBLCjfsiBFL 50zzZ8P8PReZfbbSg/VrY7vONz6pZ9pCCm6xwhVuYA== X-Google-Smtp-Source: ABdhPJyKS1A8DXKYOXudCYpU2iKtW+BNmUm+PZIhDBtu/MgYlQbInb3rKQBrmobX6NG7s7rIFNcdIEojX7zmcO/FnA4= X-Received: by 2002:a19:c5:: with SMTP id 188mr17884245lfa.511.1609157423381; Mon, 28 Dec 2020 04:10:23 -0800 (PST) MIME-Version: 1.0 References: <20201213135056.24446-1-damien.lemoal@wdc.com> <20201213135056.24446-21-damien.lemoal@wdc.com> In-Reply-To: <20201213135056.24446-21-damien.lemoal@wdc.com> From: Anup Patel Date: Mon, 28 Dec 2020 17:40:11 +0530 Message-ID: Subject: Re: [PATCH v10 20/23] riscv: Add SiPeed MAIXDUINO board device tree To: Damien Le Moal Cc: Palmer Dabbelt , linux-riscv , Rob Herring , devicetree@vger.kernel.org, Stephen Boyd , linux-clk@vger.kernel.org, Linus Walleij , linux-gpio@vger.kernel.org, Philipp Zabel , Sean Anderson Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Sun, Dec 13, 2020 at 7:22 PM Damien Le Moal wrote: > > Add a device tree for the SiPeed MAIXDUINO board. This device tree > enables LEDs and spi/mmc SD card device. Additionally, gpios and i2c > are also enabled and mapped to the board header pins as indicated on > the board itself. > > Signed-off-by: Damien Le Moal > --- > arch/riscv/boot/dts/canaan/k210_maixduino.dts | 201 ++++++++++++++++++ > 1 file changed, 201 insertions(+) > create mode 100644 arch/riscv/boot/dts/canaan/k210_maixduino.dts > > diff --git a/arch/riscv/boot/dts/canaan/k210_maixduino.dts b/arch/riscv/boot/dts/canaan/k210_maixduino.dts > new file mode 100644 > index 000000000000..681f12b46894 > --- /dev/null > +++ b/arch/riscv/boot/dts/canaan/k210_maixduino.dts > @@ -0,0 +1,201 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +/* > + * Copyright (C) 2019-20 Sean Anderson > + * Copyright (C) 2020 Western Digital Corporation or its affiliates. > + */ > + > +/dts-v1/; > + > +#include "k210.dtsi" > + > +#include > +#include > + > +/ { > + model = "SiPeed MAIXDUINO"; > + compatible = "sipeed,maixduino", "canaan,kendryte-k210"; > + > + chosen { > + bootargs = "earlycon console=ttySIF0"; > + stdout-path = "serial0:115200n8"; > + }; > + > + gpio-keys { > + compatible = "gpio-keys"; > + > + boot { > + label = "BOOT"; > + linux,code = ; > + gpios = <&gpio0 0 GPIO_ACTIVE_LOW>; > + }; > + }; > + > + sound { > + compatible = "simple-audio-card"; > + simple-audio-card,format = "i2s"; > + status = "disabled"; > + > + simple-audio-card,cpu { > + sound-dai = <&i2s0 0>; > + }; > + > + simple-audio-card,codec { > + sound-dai = <&mic>; > + }; > + }; > + > + mic: mic { > + #sound-dai-cells = <0>; > + compatible = "memsensing,msm261s4030h0"; > + status = "disabled"; > + }; > +}; > + > +&fpioa { > + status = "okay"; > + > + uarths_pinctrl: uarths-pinmux { > + pinmux = , /* Header "0" */ > + ; /* Header "1" */ > + }; > + > + gpio_pinctrl: gpio-pinmux { > + pinmux = , > + ; > + }; > + > + gpiohs_pinctrl: gpiohs-pinmux { > + pinmux = , /* BOOT */ > + , /* Header "2" */ > + , /* Header "3" */ > + , /* Header "4" */ > + , /* Header "5" */ > + , /* Header "6" */ > + , /* Header "7" */ > + , /* Header "8" */ > + , /* Header "9" */ > + , /* Header "10" */ > + , /* Header "11" */ > + , /* Header "12" */ > + ; /* Header "13" */ > + }; > + > + i2s0_pinctrl: i2s0-pinmux { > + pinmux = , > + , > + ; > + }; > + > + spi1_pinctrl: spi1-pinmux { > + pinmux = , > + , > + , > + ; /* cs */ > + }; > + > + i2c1_pinctrl: i2c1-pinmux { > + pinmux = , /* Header "scl" */ > + ; /* Header "sda" */ > + }; > + > + i2s1_pinctrl: i2s1-pinmux { > + pinmux = , > + , > + ; > + }; > + > + spi0_pinctrl: spi0-pinmux { > + pinmux = , /* cs */ > + , /* rst */ > + , /* dc */ > + ; /* wr */ > + }; > + > + dvp_pinctrl: dvp-pinmux { > + pinmux = , > + , > + , > + , > + , > + , > + , > + ; > + }; > +}; > + > +&uarths0 { > + pinctrl-0 = <&uarths_pinctrl>; > + pinctrl-names = "default"; > + status = "okay"; > +}; > + > +&gpio0 { > + pinctrl-0 = <&gpiohs_pinctrl>; > + pinctrl-names = "default"; > + status = "okay"; > +}; > + > +&gpio1 { > + pinctrl-0 = <&gpio_pinctrl>; > + pinctrl-names = "default"; > + status = "okay"; > +}; > + > +&i2s0 { > + #sound-dai-cells = <1>; > + pinctrl-0 = <&i2s0_pinctrl>; > + pinctrl-names = "default"; > +}; > + > +&i2c1 { > + pinctrl-0 = <&i2c1_pinctrl>; > + pinctrl-names = "default"; > + clock-frequency = <400000>; > + status = "okay"; > +}; > + > +&dvp0 { > + pinctrl-0 = <&dvp_pinctrl>; > + pinctrl-names = "default"; > +}; > + > +&spi0 { > + pinctrl-0 = <&spi0_pinctrl>; > + pinctrl-names = "default"; > + num-cs = <1>; > + cs-gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>; > + > + panel@0 { > + compatible = "sitronix,st7789v"; > + reg = <0>; > + reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; > + dc-gpios = <&gpio0 22 0>; > + spi-max-frequency = <15000000>; > + }; > +}; > + > +&spi1 { > + pinctrl-0 = <&spi1_pinctrl>; > + pinctrl-names = "default"; > + num-cs = <1>; > + cs-gpios = <&gpio1_0 2 GPIO_ACTIVE_LOW>; > + status = "okay"; > + > + slot@0 { > + compatible = "mmc-spi-slot"; > + reg = <0>; > + voltage-ranges = <3300 3300>; > + spi-max-frequency = <25000000>; > + broken-cd; > + }; > +}; > + > +&spi3 { > + spi-flash@0 { > + compatible = "jedec,spi-nor"; > + reg = <0>; > + spi-max-frequency = <50000000>; > + m25p,fast-read; > + broken-flash-reset; > + }; > +}; > -- > 2.29.2 > > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv Looks good to me. Reviewed-by: Anup Patel Regards, Anup