From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 330B1C10DAA for ; Sat, 12 Sep 2020 16:15:49 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E728220829 for ; Sat, 12 Sep 2020 16:15:48 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="ik2OaDdz" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725385AbgILQPr (ORCPT ); Sat, 12 Sep 2020 12:15:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37288 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725838AbgILQPn (ORCPT ); Sat, 12 Sep 2020 12:15:43 -0400 Received: from mail-lf1-x144.google.com (mail-lf1-x144.google.com [IPv6:2a00:1450:4864:20::144]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5D616C061757 for ; Sat, 12 Sep 2020 09:15:42 -0700 (PDT) Received: by mail-lf1-x144.google.com with SMTP id z19so8982638lfr.4 for ; Sat, 12 Sep 2020 09:15:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=1mfFSLJ2aT99PDQEJLg63CY2EfFTeT2UQOOCsNtG5XQ=; b=ik2OaDdzUHuVOMNMLsgvQOnL4fvUvEqien4NjpuI5VfIclMzHKWaow1odpvd5sDPJU +LXHDLiPBxR8ThB4sl5aU07BCGyBsQ0CUT5VU6uQyRjR0z/eVMBKV/EafigpOJM2w6fx tUF49I4gg9jJzUNcM/EjXzreHBPpIlb/n4r5NT5TvcdPcNldy6x3TCHdfhOof7EJKQ/u kLZH5q/yNZIk9TzYMtUHe6cNExS56wCEroXgH0iLeRteyVneoKhJ3FbCUEVL5W4iG82t Hyl6zxvpxVVMdWTF4rS9E+pNohfmkBfFjwohofeLq61gNe4dH/KzLBRCSgspSF7nutvm ByUw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=1mfFSLJ2aT99PDQEJLg63CY2EfFTeT2UQOOCsNtG5XQ=; b=VjwDGON4Euxmz7v1aApmxOzDcXqN8wBPpicgZdZODln37/JpQaocevjxPTKiCBpVsM 6wWlYMoMALgpy5P3q1wp4ZN9qtmNS8tdM9+EG8dw2CFhPuahl7sJrAlKmz2YQ3UDJZyR MQU4Qr+4sg4sSQas3QjNJD623fx2x2LfhjZgU4ewmGAdmDGnwlSJXV8fgSoRVE4D3j6l OXC8Fb+v10WhGJbxDX4ntYkjMgv3pypm8azMrdGH9/NWcHozhvRdw6PYkHobt13Ayh8H +QYbe12u1d7FTsVV8cg4Gk1NIQp6ia8HHuN17SzCLhG7G/TkQeWV+dWhiVQH98A1CHfd 3NxA== X-Gm-Message-State: AOAM530vt63KCJEa88Qdc1MSQpxXbzQY57h4+NcMTmd6JptmRzKDpS8f eZeHVeFCBdG+gjpNn/noRRObSZNG8V6xm3Yj0j26tg== X-Google-Smtp-Source: ABdhPJwzk5Ff3ZAWzHOFqk2anJO10WsYhRwbjNzmrZfdwXqXvmayMoWnkftiDhcCyLXCuPFXWkcBZk4GHcnDyvYoRF0= X-Received: by 2002:a05:6512:370b:: with SMTP id z11mr1756518lfr.571.1599927340316; Sat, 12 Sep 2020 09:15:40 -0700 (PDT) MIME-Version: 1.0 References: <20200907211712.9697-1-chris.packham@alliedtelesis.co.nz> <20200907211712.9697-2-chris.packham@alliedtelesis.co.nz> In-Reply-To: <20200907211712.9697-2-chris.packham@alliedtelesis.co.nz> From: Linus Walleij Date: Sat, 12 Sep 2020 18:15:29 +0200 Message-ID: Subject: Re: [PATCH v2 1/3] pinctrl: mvebu: Fix i2c sda definition for 98DX3236 To: Chris Packham Cc: Jason Cooper , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Rob Herring , Linux ARM , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , "open list:GPIO SUBSYSTEM" , "linux-kernel@vger.kernel.org" , Kalyan Kinthada , Rob Herring Content-Type: text/plain; charset="UTF-8" Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Mon, Sep 7, 2020 at 11:17 PM Chris Packham wrote: > Per the datasheet the i2c functions use MPP_Sel=0x1. They are documented > as using MPP_Sel=0x4 as well but mixing 0x1 and 0x4 is clearly wrong. On > the board tested 0x4 resulted in a non-functioning i2c bus so stick with > 0x1 which works. > > Fixes: d7ae8f8dee7f ("pinctrl: mvebu: pinctrl driver for 98DX3236 SoC") > Signed-off-by: Chris Packham > Reviewed-by: Andrew Lunn This patch 1/3 applied for pin control fixes. Patches 2 & 3 should go via the SoC tree. Yours, Linus Walleij