From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2366AC4338F for ; Wed, 11 Aug 2021 09:23:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id F1B9B60F55 for ; Wed, 11 Aug 2021 09:23:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234992AbhHKJXv (ORCPT ); Wed, 11 Aug 2021 05:23:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41168 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234670AbhHKJXv (ORCPT ); Wed, 11 Aug 2021 05:23:51 -0400 Received: from mail-lf1-x12b.google.com (mail-lf1-x12b.google.com [IPv6:2a00:1450:4864:20::12b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 839B0C0613D3 for ; Wed, 11 Aug 2021 02:23:27 -0700 (PDT) Received: by mail-lf1-x12b.google.com with SMTP id p38so4444514lfa.0 for ; Wed, 11 Aug 2021 02:23:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=Wv2obZIW7bS+yaiNicFM8A4ncuxkejW+sA4cvAfXZlg=; b=jX3O/8ysjqDcQbgJVpMXjGfnrZGp+OmpsIcnbEK9hVCl+2IdLp1c21IDLPnDw4Lvyo 9vCstxnPeIA/181verJTuJ+1jEZoFk56PYqGlaEgJN6cb8j4ptetHB7YkJIqgr+n2z21 TIy3VC83Ukbr0Wr7lkmxqVRMncRZOugZNDq+dJFtHqZy1jkN8bTgbA8RZdDfQ/JGoM7l tCjPkFHa9D42lmmuaPWimBl44b20PKUaoUtTp9ciEg/ya/TZhInDQ9yrOLWDjRPUKbqi quAxUT/4moEE2wjxEvWtq47tzT56or6CDJZ77E80Fgo6/wRzb2/54Vn0yo2EqjuPo7Dt lMYA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=Wv2obZIW7bS+yaiNicFM8A4ncuxkejW+sA4cvAfXZlg=; b=qUsZ5ybtOMTgQsRzwuo1nwAc2k5RS3RnXyjv96w1tRwiXBVmkXRf0Zf1Mae+VFVJGT sSo5VP5JmnOs0gRdUIF59nDuzeufyK+biuR9Z2JcY/k066Kh1VZJejw5Ayc39SEA3XoS l1aq7ziDBwBNlhAaW7WneBIC83+0bv99P7YdOlSOKi+G5y5Pupxq3o44ifmHh7NsfpLG SNSEPKRwVBROW/cSgU88lqgE0amVCnYLq5D9rCKQeMvQm9Xu9r51vsGqhJxzfyDWMEMd 3udJZDomBcJtNYN/1sIsRYfj3LIbUkndJnNoMWgkf/75y1Hg1cURO1z0u2PWqd3FFqCX rGzg== X-Gm-Message-State: AOAM533RCrv9zULiYcH9gyfUqET5JY0zY8/AxXOrOb9X3Qm9NbbW51NN 3jDI8c9yK38AT6NZnJWUjiX+eALumRi5iJsM6qoxEQ== X-Google-Smtp-Source: ABdhPJyTeVHbDouXlckDIvDSJ6/AR1HfBLteshMqv3PywJcQx+H0DVOfsZHvFYogqF2k07PL0S+wamjLfLzKzj6y9ew= X-Received: by 2002:a19:ac04:: with SMTP id g4mr8676419lfc.29.1628673805805; Wed, 11 Aug 2021 02:23:25 -0700 (PDT) MIME-Version: 1.0 References: <20210802062212.73220-1-icenowy@sipeed.com> <20210802062212.73220-8-icenowy@sipeed.com> In-Reply-To: <20210802062212.73220-8-icenowy@sipeed.com> From: Linus Walleij Date: Wed, 11 Aug 2021 11:23:14 +0200 Message-ID: Subject: Re: [PATCH 07/17] pinctrl: sunxi: add support for R329 CPUX pin controller To: Icenowy Zheng Cc: Rob Herring , Maxime Ripard , Chen-Yu Tsai , Jernej Skrabec , Ulf Hansson , Alexandre Belloni , Andre Przywara , Samuel Holland , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Linux ARM , linux-sunxi@lists.linux.dev, linux-kernel Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Mon, Aug 2, 2021 at 8:23 AM Icenowy Zheng wrote: > Allwinner R329 SoC has two pin controllers similar to ones on previous > SoCs, one in CPUX power domain and another in CPUS. > > This patch adds support for the CPUX domain pin controller. > > Signed-off-by: Icenowy Zheng Can you send the pin control changes separately? Also the bindings. Then they can be reviewed and merged separately so I don't have to pick out the stuff I can apply. Yours, Linus Walleij