From: Linus Walleij <linus.walleij@linaro.org>
To: Ben Levinsky <BLEVINSK@xilinx.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>,
Stefano Stabellini <stefanos@xilinx.com>,
"Ed T. Mooring" <emooring@xilinx.com>,
"sunnyliangjy@gmail.com" <sunnyliangjy@gmail.com>,
Punit Agrawal <punit1.agrawal@toshiba.co.jp>,
Michal Simek <michals@xilinx.com>,
"michael.auchter@ni.com" <michael.auchter@ni.com>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>,
Mathieu Poirier <mathieu.poirier@linaro.org>,
"linux-remoteproc@vger.kernel.org"
<linux-remoteproc@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Linux ARM <linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v18 4/5] dt-bindings: remoteproc: Add documentation for ZynqMP R5 rproc bindings
Date: Thu, 8 Oct 2020 22:54:12 +0200 [thread overview]
Message-ID: <CACRpkdb2AamnF9h_FfFDhTBMz7W-gob98OOzrHOiovyoiBPWRw@mail.gmail.com> (raw)
In-Reply-To: <BYAPR02MB4407F9D8A60519D00F317D27B50B0@BYAPR02MB4407.namprd02.prod.outlook.com>
On Thu, Oct 8, 2020 at 4:21 PM Ben Levinsky <BLEVINSK@xilinx.com> wrote:
> As you said, this is just regular ARM TCM memory (as seen by the main ARM64 cluster).
> Yes I can add back the compatible string, though maybe just "tcm" or "xlnx,tcm"
I mean that if it is an ARM standard feature it should be prefixed "arm,"
> That being said, we can change this around to couple the TCM bank nodes into the R5 as we have In our present, internal implementation at
> - https://github.com/Xilinx/linux-xlnx/blob/master/Documentation/devicetree/bindings/remoteproc/xilinx%2Czynqmp-r5-remoteproc.txt
> - https://github.com/Xilinx/linux-xlnx/blob/master/drivers/remoteproc/zynqmp_r5_remoteproc.c
> the TCM nodes are coupled in the R5 but after some previous review on this list, it was moved to have the TCM nodes decoupled from the R5 node
>
> I am not sure what you mean on the Arm64 handling of TCM memory. Via the architecture of the SoC https://www.xilinx.com/support/documentation/user_guides/ug1085-zynq-ultrascale-trm.pdf I know that the A53 cluster can see the absolute addresses of the R5 cluster so the translation is *I think* done as you describe with the CP15 instructions you listed.
It seems like the TCM memories are von Neumann type (either can
contain both code and
data) which removes one of my worries. According to this data sheet
they are also nothing
ARM-provided but a Xilinx invention, and just happen to be hardcoded
at the same address
as TCM memories in ARM32, what a coincidence.
So I take it this is the correct view and you can proceed like this,
sorry for the fuzz.
Yours,
Linus Walleij
next prev parent reply other threads:[~2020-10-08 20:54 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-05 16:06 [PATCH v18 0/5] Provide basic driver to control Arm R5 co-processor found on Xilinx ZynqMP Ben Levinsky
2020-10-05 16:06 ` [PATCH v18 1/5] firmware: xilinx: Add ZynqMP firmware ioctl enums for RPU configuration Ben Levinsky
2020-10-05 16:06 ` [PATCH v18 2/5] firmware: xilinx: Add shutdown/wakeup APIs Ben Levinsky
2020-10-05 16:06 ` [PATCH v18 3/5] firmware: xilinx: Add RPU configuration APIs Ben Levinsky
2020-10-05 16:06 ` [PATCH v18 4/5] dt-bindings: remoteproc: Add documentation for ZynqMP R5 rproc bindings Ben Levinsky
2020-10-08 12:37 ` Linus Walleij
2020-10-08 14:21 ` Ben Levinsky
2020-10-08 16:45 ` Ben Levinsky
2020-10-08 20:22 ` Stefano Stabellini
2020-10-08 20:54 ` Linus Walleij [this message]
2020-10-05 16:06 ` [PATCH v18 5/5] remoteproc: Add initial zynqmp R5 remoteproc driver Ben Levinsky
2020-10-05 19:34 ` Michael Auchter
2020-10-06 19:15 ` Ben Levinsky
2020-10-06 21:31 ` Michael Auchter
2020-10-06 21:46 ` Ben Levinsky
2020-10-06 22:20 ` Michael Auchter
2020-10-07 14:31 ` Ben Levinsky
2020-10-15 18:31 ` Ben Levinsky
2020-10-19 20:43 ` Stefano Stabellini
2020-10-19 21:33 ` Ben Levinsky
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