From: Adam Ford <aford173@gmail.com>
To: Abel Vesa <abel.vesa@nxp.com>
Cc: Lucas Stach <l.stach@pengutronix.de>, Marek Vasut <marex@denx.de>,
devicetree <devicetree@vger.kernel.org>,
Shawn Guo <shawnguo@kernel.org>,
Frieder Schrempf <frieder.schrempf@kontron.de>,
patchwork-lst@pengutronix.de, Rob Herring <robh+dt@kernel.org>,
NXP Linux Team <linux-imx@nxp.com>,
Sascha Hauer <kernel@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>,
arm-soc <linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH 10/11] arm64: dts: imx8mm: add GPC node and power domains
Date: Mon, 26 Oct 2020 06:13:17 -0500 [thread overview]
Message-ID: <CAHCN7xJG3m_n_PhJpi-Fdkh98PRtjyF+7QFFYoBbbB2=3Bti6g@mail.gmail.com> (raw)
In-Reply-To: <20201026110140.2m7it3atlgrp5qrt@fsr-ub1664-175>
On Mon, Oct 26, 2020 at 6:07 AM Abel Vesa <abel.vesa@nxp.com> wrote:
>
> On 20-10-26 12:56:22, Abel Vesa wrote:
> > On 20-09-30 17:50:05, Lucas Stach wrote:
> > > This adds the DT nodes to describe the power domains available on the
> > > i.MX8MM. Things are a bit more complex compared to other GPCv2 power
> > > domain setups, as there is now a hierarchy of domains where complete
> > > subsystems (HSIO, GPU, DISPLAY) can be gated as a whole, but also
> > > fine granular gating within those subsystems is possible.
> > >
> > > Note that this is still incomplete, as both VPU and DISP domains are
> > > missing their reset clocks. Those aren't directly sourced from the CCM,
> > > but have another level of clock gating in the BLKCTL of those domains,
> > > which needs a separate driver.
> > >
> > > Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
> > > ---
> > > arch/arm64/boot/dts/freescale/imx8mm.dtsi | 57 +++++++++++++++++++++++
> > > 1 file changed, 57 insertions(+)
> > >
> > > diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > > index 76f040e4be5e..a841fb2d0458 100644
> > > --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > > +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > > @@ -4,6 +4,8 @@
> > > */
> > >
> > > #include <dt-bindings/clock/imx8mm-clock.h>
> > > +#include <dt-bindings/power/imx8mm-power.h>
> > > +#include <dt-bindings/reset/imx8mq-reset.h>
> >
> > Needs to be imx8mm-reset.h, as in 8MM, not 8MQ.
> >
>
> Actually, now I see what you've done here. You want to use the IMX8MQ_RESET_GPU_RESET.
>
> But I think we should avoid having reset IDs shared between i.MX8M platforms.
>
> I'll try to find another way around this myself.
The nano does the same thing as the mini as both appear to be subsets
of the i.MX8MQ. I spent a fair amount of time reviewing the SRC
driver yesterday.
>
> > > #include <dt-bindings/gpio/gpio.h>
> > > #include <dt-bindings/input/input.h>
> > > #include <dt-bindings/interrupt-controller/arm-gic.h>
> > > @@ -547,6 +549,61 @@
> > > interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
> > > #reset-cells = <1>;
> > > };
> > > +
> > > + gpc: gpc@303a0000 {
> > > + compatible = "fsl,imx8mm-gpc";
> > > + reg = <0x303a0000 0x10000>;
> > > + interrupt-parent = <&gic>;
> > > + interrupt-controller;
> > > + #interrupt-cells = <3>;
> > > +
> > > + pgc {
> > > + #address-cells = <1>;
> > > + #size-cells = <0>;
> > > +
> > > + pgc_hsiomix: power-domain@0 {
> > > + #power-domain-cells = <0>;
> > > + reg = <IMX8MM_POWER_DOMAIN_HSIOMIX>;
> > > + clocks = <&clk IMX8MM_CLK_USB_BUS>;
> > > + };
> > > +
> > > + pgc_pcie: power-domain@1 {
> > > + #power-domain-cells = <0>;
> > > + reg = <IMX8MM_POWER_DOMAIN_PCIE>;
> > > + power-domains = <&pgc_hsiomix>;
> > > + };
> > > +
> > > + pgc_otg1: power-domain@2 {
> > > + #power-domain-cells = <0>;
> > > + reg = <IMX8MM_POWER_DOMAIN_OTG1>;
> > > + power-domains = <&pgc_hsiomix>;
> > > + };
> > > +
> > > + pgc_otg2: power-domain@3 {
> > > + #power-domain-cells = <0>;
> > > + reg = <IMX8MM_POWER_DOMAIN_OTG2>;
> > > + power-domains = <&pgc_hsiomix>;
> > > + };
> > > +
> > > + pgc_gpumix: power-domain@4 {
> > > + #power-domain-cells = <0>;
> > > + reg = <IMX8MM_POWER_DOMAIN_GPUMIX>;
> > > + clocks = <&clk IMX8MM_CLK_GPU_BUS_ROOT>,
> > > + <&clk IMX8MM_CLK_GPU_AHB>;
> > > + };
> > > +
> > > + pgc_gpu: power-domain@5 {
> > > + #power-domain-cells = <0>;
> > > + reg = <IMX8MM_POWER_DOMAIN_GPU>;
> > > + clocks = <&clk IMX8MM_CLK_GPU_AHB>,
> > > + <&clk IMX8MM_CLK_GPU_BUS_ROOT>,
> > > + <&clk IMX8MM_CLK_GPU2D_ROOT>,
> > > + <&clk IMX8MM_CLK_GPU3D_ROOT>;
> > > + resets = <&src IMX8MQ_RESET_GPU_RESET>;
> > > + power-domains = <&pgc_gpumix>;
> > > + };
> > > + };
> > > + };
> > > };
> > >
> > > aips2: bus@30400000 {
> > > --
> > > 2.20.1
> > >
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-10-26 11:13 UTC|newest]
Thread overview: 59+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-30 15:49 [PATCH 00/11] i.MX8MM power domain support Lucas Stach
2020-09-30 15:49 ` [PATCH 01/11] soc: imx: gpcv2: move to more ideomatic error handling in probe Lucas Stach
2020-09-30 16:04 ` Marek Vasut
2020-09-30 15:49 ` [PATCH 02/11] soc: imx: gpcv2: move domain mapping to domain driver probe Lucas Stach
2020-09-30 16:07 ` Marek Vasut
2020-09-30 15:49 ` [PATCH 03/11] soc: imx: gpcv2: split power up and power down sequence control Lucas Stach
2020-09-30 16:10 ` Marek Vasut
2020-09-30 15:49 ` [PATCH 04/11] soc: imx: gpcv2: wait for ADB400 handshake Lucas Stach
2020-09-30 16:11 ` Marek Vasut
2020-09-30 16:19 ` Lucas Stach
2020-09-30 16:23 ` Marek Vasut
2020-10-09 3:05 ` Jacky Bai
2020-10-09 7:27 ` Marek Vasut
2020-10-09 7:51 ` Jacky Bai
2020-10-09 8:19 ` Marek Vasut
2020-09-30 15:50 ` [PATCH 05/11] soc: imx: gpcv2: add runtime PM support for power-domains Lucas Stach
2020-09-30 16:14 ` Marek Vasut
2020-09-30 16:20 ` Lucas Stach
2020-09-30 15:50 ` [PATCH 06/11] soc: imx: gpcv2: allow domains without power-sequence control Lucas Stach
2020-10-09 7:54 ` Jacky Bai
2020-10-09 7:57 ` Jacky Bai
2020-09-30 15:50 ` [PATCH 07/11] soc: imx: gpcv2: add support for optional resets Lucas Stach
2020-09-30 16:15 ` Marek Vasut
2020-09-30 16:23 ` Lucas Stach
2020-09-30 16:30 ` Marek Vasut
2020-09-30 16:34 ` Lucas Stach
2020-09-30 16:38 ` Marek Vasut
2020-10-01 8:59 ` Krzysztof Kozlowski
2020-10-06 19:42 ` Rob Herring
2020-09-30 15:50 ` [PATCH 08/11] dt-bindings: add defines for i.MX8MM power domains Lucas Stach
2020-10-01 8:54 ` Krzysztof Kozlowski
2020-10-06 19:47 ` Rob Herring
2020-09-30 15:50 ` [PATCH 09/11] soc: imx: gpcv2: add support " Lucas Stach
2020-09-30 16:18 ` Marek Vasut
2020-09-30 15:50 ` [PATCH 10/11] arm64: dts: imx8mm: add GPC node and " Lucas Stach
2020-09-30 16:20 ` Marek Vasut
2020-10-01 8:51 ` Krzysztof Kozlowski
2020-10-23 13:22 ` Adam Ford
2020-10-23 14:39 ` Jacky Bai
2020-10-26 10:56 ` Abel Vesa
2020-10-26 11:01 ` Abel Vesa
2020-10-26 11:13 ` Adam Ford [this message]
2020-10-26 11:02 ` Lucas Stach
2020-09-30 15:50 ` [PATCH 11/11] arm64: dts: imx8mm: put USB controllers into power-domains Lucas Stach
2020-10-01 7:46 ` [PATCH 00/11] i.MX8MM power domain support Frieder Schrempf
2020-10-03 18:03 ` Adam Ford
[not found] ` <CAHCN7xKjWEwQr9y0QLrR6KVT=ut=v=coqt4beAvrz1kQSGbX1g@mail.gmail.com>
2020-10-03 18:08 ` Marek Vasut
2020-10-03 18:11 ` Adam Ford
2020-10-08 20:47 ` Adam Ford
2020-10-09 3:00 ` Jacky Bai
2020-10-09 11:12 ` Lucas Stach
2020-10-09 12:57 ` Adam Ford
2020-10-10 2:16 ` Jacky Bai
2020-10-13 18:26 ` Lucas Stach
2020-10-14 1:23 ` Peng Fan
2020-10-22 8:24 ` Lucas Stach
2020-10-22 16:36 ` Fabio Estevam
2020-10-28 13:50 ` Peng Fan
2020-10-31 13:56 ` Adam Ford
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to='CAHCN7xJG3m_n_PhJpi-Fdkh98PRtjyF+7QFFYoBbbB2=3Bti6g@mail.gmail.com' \
--to=aford173@gmail.com \
--cc=abel.vesa@nxp.com \
--cc=devicetree@vger.kernel.org \
--cc=festevam@gmail.com \
--cc=frieder.schrempf@kontron.de \
--cc=kernel@pengutronix.de \
--cc=l.stach@pengutronix.de \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-imx@nxp.com \
--cc=marex@denx.de \
--cc=patchwork-lst@pengutronix.de \
--cc=robh+dt@kernel.org \
--cc=shawnguo@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).