From: Andy Shevchenko <andy.shevchenko@gmail.com>
To: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Cc: Andy Gross <agross@kernel.org>,
Bjorn Andersson <bjorn.andersson@linaro.org>,
Liam Girdwood <lgirdwood@gmail.com>,
Mark Brown <broonie@kernel.org>, Rob Herring <robh+dt@kernel.org>,
plai@codeaurora.org, Banajit Goswami <bgoswami@codeaurora.org>,
Jaroslav Kysela <perex@perex.cz>, Takashi Iwai <tiwai@suse.com>,
Srinivas Kandagatla <srinivas.kandagatla@linaro.org>,
rohitkr@codeaurora.org, linux-arm-msm@vger.kernel.org,
ALSA Development Mailing List <alsa-devel@alsa-project.org>,
devicetree <devicetree@vger.kernel.org>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
Stephen Boyd <swboyd@chromium.org>,
judyhsiao@chromium.org, Linus Walleij <linus.walleij@linaro.org>,
"open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
Venkata Prasad Potturu <quic_potturu@quicinc.com>
Subject: Re: [PATCH v5 3/5] pinctrl: qcom: Extract chip specific LPASS LPI code
Date: Wed, 8 Dec 2021 08:28:23 +0200 [thread overview]
Message-ID: <CAHp75Vd=47Tv9Sf+styPhxS2=O1H2KUDeKQXTULUYU5fDgGwwA@mail.gmail.com> (raw)
In-Reply-To: <1638891339-21806-4-git-send-email-quic_srivasam@quicinc.com>
On Wed, Dec 8, 2021 at 2:39 AM Srinivasa Rao Mandadapu
<quic_srivasam@quicinc.com> wrote:
>
> Extract the chip specific SM8250 data from the LPASS LPI pinctrl driver
> to allow reusing the common code in the addition of subsequent
> platforms.
...
> @@ -661,8 +454,10 @@ static int lpi_pinctrl_probe(struct platform_device *pdev)
>
> return ret;
> }
> +EXPORT_SYMBOL(lpi_pinctrl_probe);
> +
Stray change.
...
> +#ifndef __PINCTRL_LPASS_LPI_H__
> +#define __PINCTRL_LPASS_LPI_H__
Missed headers.
At least bits.h.
...
> +#define NO_SLEW -1
Naming sucks for the header.
LPI_NO_SLEW ?
...
> +struct lpi_pingroup {
> + const char *name;
> + const unsigned int *pins;
> + unsigned int npins;
> + unsigned int pin;
> + /* Bit offset in slew register for SoundWire pins only */
> + int slew_offset;
> + unsigned int *funcs;
> + unsigned int nfuncs;
> +};
Are you going to convert this to use struct group_desc?
...
> + LPI_MUX__,
Strange naming. Besides, if it is the terminator, drop the comma.
--
With Best Regards,
Andy Shevchenko
next prev parent reply other threads:[~2021-12-08 6:29 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-07 15:35 [PATCH v5 0/5] Add pin control support for lpass sc7280 Srinivasa Rao Mandadapu
2021-12-07 15:35 ` [PATCH v5 1/5] dt-bindings: pinctrl: qcom: Update lpass lpi file name to SoC specific Srinivasa Rao Mandadapu
2021-12-10 21:15 ` Rob Herring
2021-12-07 15:35 ` [PATCH v5 2/5] dt-bindings: pinctrl: qcom: Add sc7280 lpass lpi pinctrl bindings Srinivasa Rao Mandadapu
2021-12-08 9:24 ` Srinivas Kandagatla
2021-12-08 10:11 ` Srinivasa Rao Mandadapu
2021-12-10 21:17 ` Rob Herring
2021-12-10 21:18 ` Rob Herring
2021-12-07 15:35 ` [PATCH v5 3/5] pinctrl: qcom: Extract chip specific LPASS LPI code Srinivasa Rao Mandadapu
2021-12-08 6:28 ` Andy Shevchenko [this message]
2021-12-14 17:15 ` Srinivasa Rao Mandadapu
2021-12-14 17:16 ` Andy Shevchenko
2021-12-14 17:22 ` Srinivasa Rao Mandadapu
2021-12-14 17:37 ` Andy Shevchenko
2021-12-07 15:35 ` [PATCH v5 4/5] pinctrl: qcom: Add SC7280 lpass pin configuration Srinivasa Rao Mandadapu
2021-12-07 15:35 ` [PATCH v5 5/5] pinctrl: qcom: Update clock voting as optional Srinivasa Rao Mandadapu
2021-12-15 1:28 ` [PATCH v5 0/5] Add pin control support for lpass sc7280 Stephen Boyd
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