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From: Arnd Bergmann <arnd@arndb.de>
To: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Andrew Murray <andrew.murray@arm.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Rob Herring <robh+dt@kernel.org>,
	linux-pci <linux-pci@vger.kernel.org>,
	DTML <devicetree@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	linux-omap <linux-omap@vger.kernel.org>
Subject: Re: [PATCH 05/13] PCI: cadence: Add read and write accessors to perform only 32-bit accesses
Date: Thu, 19 Dec 2019 21:16:28 +0100	[thread overview]
Message-ID: <CAK8P3a1pGiUco9DcBSOWbck4_qLTUcO5awPe1+sM9Jun17xsOw@mail.gmail.com> (raw)
In-Reply-To: <9b40e71a-c18c-a958-84fe-c5a126fe8272@ti.com>

On Thu, Dec 19, 2019 at 2:17 PM Kishon Vijay Abraham I <kishon@ti.com> wrote:
> On 19/12/19 5:33 pm, Arnd Bergmann wrote:
> > On Thu, Dec 19, 2019 at 12:54 PM Kishon Vijay Abraham I <kishon@ti.com> wrote:
> >>
> >> Hi Andrew,
> >>
> >> On 16/12/19 8:19 pm, Andrew Murray wrote:
> >>> On Mon, Dec 09, 2019 at 02:51:39PM +0530, Kishon Vijay Abraham I wrote:
> >>>> Certain platforms like TI's J721E allow only 32-bit register accesses.
> >>>
> >>> When I first read this I thought you meant only 32-bit accesses are allowed
> >>> and not other sizes (such as 64-bit). However the limitation you address
> >>> here is that the J721E allows only 32-bit *aligned* register accesses.
> >>
> >> It's both, it allows only 32-bit aligned accesses and the size should be
> >> only 32 bits. That's why I always use "readl" in the APIs below.
> >
> > In that case, can't you use the pci_generic_config_read32/write32
> > functions with a cadence specific .map_bus() function?
>
> pci_generic_config_read32() is for reading configuration space registers
> only. The accessors I added here are for the controller IP configuration.
>
> For the configuration space access I use
> pci_generic_config_read32/write32()([PATCH 11/13] PCI: j721e: Add TI
> J721E PCIe driver).

Got it, thanks for the clarification.

       Arnd

  reply	other threads:[~2019-12-19 20:16 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-12-09  9:21 [PATCH 00/13] Add PCIe support to TI's J721E SoC Kishon Vijay Abraham I
2019-12-09  9:21 ` [PATCH 01/13] PCI: cadence: Remove stray "pm_runtime_put_sync()" in error path Kishon Vijay Abraham I
2019-12-16 13:45   ` Andrew Murray
2019-12-19  8:31     ` Kishon Vijay Abraham I
2019-12-09  9:21 ` [PATCH 02/13] linux/kernel.h: Add PTR_ALIGN_DOWN macro Kishon Vijay Abraham I
2019-12-09  9:21 ` [PATCH 03/13] PCI: cadence: Add support to use custom read and write accessors Kishon Vijay Abraham I
2019-12-16 14:07   ` Andrew Murray
2019-12-19 11:41     ` Kishon Vijay Abraham I
2019-12-09  9:21 ` [PATCH 04/13] PCI: cadence: Add support to start link and verify link status Kishon Vijay Abraham I
2019-12-17 11:58   ` Andrew Murray
2019-12-19 12:01     ` Kishon Vijay Abraham I
2019-12-09  9:21 ` [PATCH 05/13] PCI: cadence: Add read and write accessors to perform only 32-bit accesses Kishon Vijay Abraham I
2019-12-09 21:15   ` Bjorn Helgaas
2019-12-16 14:49   ` Andrew Murray
2019-12-19 11:56     ` Kishon Vijay Abraham I
2019-12-19 12:03       ` Arnd Bergmann
2019-12-19 13:19         ` Kishon Vijay Abraham I
2019-12-19 20:16           ` Arnd Bergmann [this message]
2019-12-17 23:36   ` Bjorn Helgaas
2019-12-19 12:49     ` Kishon Vijay Abraham I
2019-12-09  9:21 ` [PATCH 06/13] PCI: cadence: Allow pci_host_bridge to have custom pci_ops Kishon Vijay Abraham I
2019-12-17 12:32   ` Andrew Murray
2019-12-19 12:02     ` Kishon Vijay Abraham I
2019-12-09  9:21 ` [PATCH 07/13] PCI: cadence: Add new *ops* for CPU addr fixup Kishon Vijay Abraham I
2019-12-17 12:40   ` Andrew Murray
2019-12-19 12:03     ` Kishon Vijay Abraham I
2019-12-09  9:21 ` [PATCH 08/13] PCI: cadence: Use local management register to configure Vendor ID Kishon Vijay Abraham I
2019-12-17 12:42   ` Andrew Murray
2019-12-19 12:12     ` Kishon Vijay Abraham I
2019-12-09  9:21 ` [PATCH 09/13] dt-bindings: PCI: Add host mode dt-bindings for TI's J721E SoC Kishon Vijay Abraham I
2019-12-19  0:08   ` Rob Herring
2019-12-19 13:13     ` Kishon Vijay Abraham I
2019-12-24  8:06     ` Kishon Vijay Abraham I
2019-12-09  9:21 ` [PATCH 10/13] dt-bindings: PCI: Add EP " Kishon Vijay Abraham I
2019-12-19  0:14   ` Rob Herring
2019-12-19 13:14     ` Kishon Vijay Abraham I
2019-12-09  9:21 ` [PATCH 11/13] PCI: j721e: Add TI J721E PCIe driver Kishon Vijay Abraham I
2019-12-17 14:23   ` Andrew Murray
2019-12-19 22:47   ` Bjorn Helgaas
2019-12-09  9:21 ` [PATCH 12/13] misc: pci_endpoint_test: Add J721E in pci_device_id table Kishon Vijay Abraham I
2019-12-09  9:21 ` [PATCH 13/13] MAINTAINERS: Add Kishon Vijay Abraham I for TI J721E SoC PCIe Kishon Vijay Abraham I

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