From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 74663C35242 for ; Tue, 11 Feb 2020 19:44:03 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 4E21324689 for ; Tue, 11 Feb 2020 19:44:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1581450243; bh=DvzM0ydj4D5pq1pifhh+bBq3fqq6xA8Afwwx469Vkho=; h=References:In-Reply-To:From:Date:Subject:To:Cc:List-ID:From; b=Kl86xKi/4rs7bA8ntRItLJ/9am+A9UmxZhXj8v3OkQwlMK0IQoSilKoWCKmrT4h92 tHuQC3At17D+r9bNL2UtOtpQs8B70rKPa4KOAJUoEhJSQsDHk7gOkwHwh3K6YRN+6T gQ7YTVHrDAV4PrwEso6XSfU98+pvClxNAS3SJcDA= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730487AbgBKToA (ORCPT ); Tue, 11 Feb 2020 14:44:00 -0500 Received: from mail.kernel.org ([198.145.29.99]:48552 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729462AbgBKToA (ORCPT ); Tue, 11 Feb 2020 14:44:00 -0500 Received: from mail-qv1-f49.google.com (mail-qv1-f49.google.com [209.85.219.49]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 893432467D; Tue, 11 Feb 2020 19:43:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1581450238; bh=DvzM0ydj4D5pq1pifhh+bBq3fqq6xA8Afwwx469Vkho=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=UNht+1KGl/nLZWZpg26EufuWcgrSTOX3VAIgakbRdyF2CL16G2d4+TZBX36/+LFWD hZVpXwfUvNeNOeXs4r2ZZDOuxALHac6LbPjwBx8kLxlOLqouwe2fLw1ue4BoFTRlbA TsB1ToXb6pvScjFYZwFZQLoiCU5100lh5WwswRSI= Received: by mail-qv1-f49.google.com with SMTP id dc14so5574755qvb.9; Tue, 11 Feb 2020 11:43:58 -0800 (PST) X-Gm-Message-State: APjAAAUxjBfdD+jsWNlplxY/6YFDOPpXU63idb7/ZowHv1SJF15khioU HmNcjsfEZK5Hg0Xd5+qbSz7SxZV4oXTT9sPeag== X-Google-Smtp-Source: APXvYqwWjbNjReDsgQKr6XDaSggOqqPVRJvQCHJ/GYq2amBCeGZ41X9dHAmHfM9j4TENY3W9kgIrEy30L5K8rEJVBI8= X-Received: by 2002:a05:6214:11ac:: with SMTP id u12mr4422199qvv.85.1581450237590; Tue, 11 Feb 2020 11:43:57 -0800 (PST) MIME-Version: 1.0 References: <20200207052627.130118-1-drinkcat@chromium.org> <20200207052627.130118-6-drinkcat@chromium.org> In-Reply-To: <20200207052627.130118-6-drinkcat@chromium.org> From: Rob Herring Date: Tue, 11 Feb 2020 13:43:46 -0600 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v4 5/7] drm/panfrost: Add support for multiple power domains To: Nicolas Boichat , Saravana Kannan Cc: David Airlie , Daniel Vetter , Mark Rutland , Matthias Brugger , Tomeu Vizoso , Steven Price , Alyssa Rosenzweig , Liam Girdwood , Mark Brown , dri-devel , devicetree@vger.kernel.org, "linux-kernel@vger.kernel.org" , "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" , "moderated list:ARM/Mediatek SoC support" , Hsin-Yi Wang , Ulf Hansson Content-Type: text/plain; charset="UTF-8" Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org +Saravana On Thu, Feb 6, 2020 at 11:27 PM Nicolas Boichat wrote: > > When there is a single power domain per device, the core will > ensure the power domain is switched on (so it is technically > equivalent to having not power domain specified at all). > > However, when there are multiple domains, as in MT8183 Bifrost > GPU, we need to handle them in driver code. > > Signed-off-by: Nicolas Boichat > > --- > > The downstream driver we use on chromeos-4.19 currently uses 2 > additional devices in device tree to accomodate for this [1], but > I believe this solution is cleaner. > > [1] https://chromium.googlesource.com/chromiumos/third_party/kernel/+/refs/heads/chromeos-4.19/drivers/gpu/arm/midgard/platform/mediatek/mali_kbase_runtime_pm.c#31 > > v4: > - Match the exact power domain names as specified in the compatible > struct, instead of just matching the number of power domains. > [Review: Ulf Hansson] > - Dropped print and reordered function [Review: Steven Price] > - nits: Run through latest version of checkpatch: > - Use WARN instead of BUG_ON. > - Drop braces for single expression if block. > v3: > - Use the compatible matching data to specify the number of power > domains. Note that setting 0 or 1 in num_pm_domains is equivalent > as the core will handle these 2 cases in the exact same way > (automatically, without driver intervention), and there should > be no adverse consequence in this case (the concern is about > switching on only some power domains and not others). > > drivers/gpu/drm/panfrost/panfrost_device.c | 97 ++++++++++++++++++++-- > drivers/gpu/drm/panfrost/panfrost_device.h | 11 +++ > drivers/gpu/drm/panfrost/panfrost_drv.c | 2 + > 3 files changed, 102 insertions(+), 8 deletions(-) > > diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/panfrost/panfrost_device.c > index 3720d50f6d9f965..8136babd3ba9935 100644 > --- a/drivers/gpu/drm/panfrost/panfrost_device.c > +++ b/drivers/gpu/drm/panfrost/panfrost_device.c > @@ -5,6 +5,7 @@ > #include > #include > #include > +#include > #include > > #include "panfrost_device.h" > @@ -120,6 +121,79 @@ static void panfrost_regulator_fini(struct panfrost_device *pfdev) > pfdev->regulators); > } > > +static void panfrost_pm_domain_fini(struct panfrost_device *pfdev) > +{ > + int i; > + > + for (i = 0; i < ARRAY_SIZE(pfdev->pm_domain_devs); i++) { > + if (!pfdev->pm_domain_devs[i]) > + break; > + > + if (pfdev->pm_domain_links[i]) > + device_link_del(pfdev->pm_domain_links[i]); > + > + dev_pm_domain_detach(pfdev->pm_domain_devs[i], true); > + } > +} > + > +static int panfrost_pm_domain_init(struct panfrost_device *pfdev) > +{ > + int err; > + int i, num_domains; > + > + num_domains = of_count_phandle_with_args(pfdev->dev->of_node, > + "power-domains", > + "#power-domain-cells"); > + > + /* > + * Single domain is handled by the core, and, if only a single power > + * the power domain is requested, the property is optional. > + */ > + if (num_domains < 2 && pfdev->comp->num_pm_domains < 2) > + return 0; > + > + if (num_domains != pfdev->comp->num_pm_domains) { > + dev_err(pfdev->dev, > + "Incorrect number of power domains: %d provided, %d needed\n", > + num_domains, pfdev->comp->num_pm_domains); > + return -EINVAL; > + } > + > + if (WARN(num_domains > ARRAY_SIZE(pfdev->pm_domain_devs), > + "Too many supplies in compatible structure.\n")) > + return -EINVAL; > + > + for (i = 0; i < num_domains; i++) { > + pfdev->pm_domain_devs[i] = > + dev_pm_domain_attach_by_name(pfdev->dev, > + pfdev->comp->pm_domain_names[i]); > + if (IS_ERR_OR_NULL(pfdev->pm_domain_devs[i])) { > + err = PTR_ERR(pfdev->pm_domain_devs[i]) ? : -ENODATA; > + pfdev->pm_domain_devs[i] = NULL; > + dev_err(pfdev->dev, > + "failed to get pm-domain %s(%d): %d\n", > + pfdev->comp->pm_domain_names[i], i, err); > + goto err; > + } > + > + pfdev->pm_domain_links[i] = device_link_add(pfdev->dev, > + pfdev->pm_domain_devs[i], DL_FLAG_PM_RUNTIME | > + DL_FLAG_STATELESS | DL_FLAG_RPM_ACTIVE); We're in the process of adding device links based on DT properties. Shouldn't we add power domains to that? See drivers/of/property.c for what's handled. Rob