From mboxrd@z Thu Jan 1 00:00:00 1970 From: Bartosz Golaszewski Subject: =?UTF-8?Q?Re=3A_=5BPATCH_v6_00=2F41=5D_ARM=3A_davinci=3A_convert_to_common?= =?UTF-8?Q?_clock_framework=E2=80=8B?= Date: Tue, 23 Jan 2018 20:53:20 +0100 Message-ID: References: <1516468460-4908-1-git-send-email-david@lechnology.com> <615bc302-e129-1501-63be-fa701f5ecaad@lechnology.com> <5f836454-5de7-c51d-d262-2c2dbc26e438@lechnology.com> Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Return-path: In-Reply-To: Sender: linux-clk-owner@vger.kernel.org To: David Lechner Cc: Adam Ford , linux-clk@vger.kernel.org, devicetree , linux-arm-kernel@lists.infradead.org, Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland , Sekhar Nori , Kevin Hilman , Bartosz Golaszewski , Linux Kernel Mailing List List-Id: devicetree@vger.kernel.org 2018-01-23 20:24 GMT+01:00 David Lechner : > On 01/23/2018 12:34 PM, Bartosz Golaszewski wrote: >> >> 2018-01-23 19:26 GMT+01:00 David Lechner : >>> >>> On 01/23/2018 12:10 PM, Bartosz Golaszewski wrote: >>>> >>>> >>>> 2018-01-23 18:03 GMT+01:00 Adam Ford : >>>>> >>>>> >>>>> On Tue, Jan 23, 2018 at 10:06 AM, David Lechner >>>>> wrote: >>>>>> >>>>>> >>>>>> On 01/23/2018 10:03 AM, David Lechner wrote: >>>>>>> >>>>>>> >>>>>>> >>>>>>> You can see if the clock is enabled by running: >>>>>>> >>>>>>> cat /sys/kernel/debug/clk/clk_summary >>>>>>> >>>>>> >>>>>> I just realized if you can't boot, you can't do this. :-/ >>>>> >>>>> >>>>> >>>>> I can boot with the latest set in your git repo, but the Ethernet >>>>> doesn't apparently fully operate. I don't get errors, but I cannot >>>>> get a dhcp address. >>>>> >>>>> I'll try to do a more exhaustive test later today to get an idea of >>>>> what works and what doesn't. When I ran my basic tests, I just did a >>>>> feel-good boot test (and reboot test) >>>>> >>>>> adam >>>> >>>> >>>> >>>> FYI: manually calling clk_prepare_enable() in the davinci_mdio driver >>>> seems to at least fix the ethernet. In master branch it's done by >>>> pm_runtime_get_sync() (in davinci_mdio_reset()). However I'm still >>>> getting several oopses and WARNs so there's some more work to do. >>>> >>> >>> Hmm... I'm wondering if we need to also add #power-domain-cells to the >>> PSC clocks and power-domains properties to the consumers. >>> >>> For this specific case though, it seems strange to me that the drivers >>> to clk_get() and clk_get_rate() but never enable the clocks. >>> >>> >>> Also, are the oopses and WARNs the same as before? >> >> >> No, the ones before were all related to the ethernet failing, now I >> get several stack traces from drm. Posted them on pastebin[1]. >> > > It looks like the LCDC driver is the same way. It does clk_get() but > not clk_prepare_enable(). > > In the mdio case - the problem is that devm_clk_get() doesn't fail, but somehow the clock doesn't end up in the list of the device's clocks - which is why it's not enabled by pm_runtime_get_sync(). Bartosz