From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0D2A4C433B4 for ; Wed, 21 Apr 2021 15:13:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C1ABA61457 for ; Wed, 21 Apr 2021 15:13:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239789AbhDUPO0 (ORCPT ); Wed, 21 Apr 2021 11:14:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39444 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238221AbhDUPO0 (ORCPT ); Wed, 21 Apr 2021 11:14:26 -0400 Received: from mail-yb1-xb31.google.com (mail-yb1-xb31.google.com [IPv6:2607:f8b0:4864:20::b31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ED248C06138B for ; Wed, 21 Apr 2021 08:13:52 -0700 (PDT) Received: by mail-yb1-xb31.google.com with SMTP id z1so47571687ybf.6 for ; Wed, 21 Apr 2021 08:13:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=bXPVXy/1jXKrltuMJNC38xdPZ2uBC+6lqk1pZ76QL1U=; b=BW3+XWMr5mN2mKApFiwj7vayhL5WXOHJvcgip9ht9GaAcZdgUv/6PY5VNfWU+sop5B O6kvK+Yy7L4hTiyo++b3bkXmTltJVKq7NFOCzUPHL2iYebSazwLh6GNh1+g/1T+cc41i Yj5f1a3+egNr3reEx6rS2ujUvgVOBCx+YhCtcGep6hTK4fFgjWVOq76bVE+rvPGlPMvn xYS1x+sMMWsUOTZzV9tB83Cl3zMJXsVl+K+Cwb1i115/Mga08utgzW7uUS42k5I9FjwB +KWDXoXV+PS0KJBNXunt2Ll3Epd6yioqTrWMU88+2tV9wwuCLhYvussofDhhsheZPPXu S0vA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=bXPVXy/1jXKrltuMJNC38xdPZ2uBC+6lqk1pZ76QL1U=; b=JiXXJZ8BXRa3Nm+3ExkWJAVF0qmgkoaI3Bf1gctlb2Zis/l5dlNarFzu0PyE+Ayil3 ZvwfazQQI0Q57TgSmdoK8vftvfM8nQ52Ol6UtZxswNoxWXZSIMrHdclDRkqppP+jLGAG wNRFoQzEoa0fD8KibWcb6HIp5di1SJZ8+4NKMXcNu5+EGfewijyDFMOm2QQg8lHr1R5L 2jLah1M8iwcaOwtem8jakkJlJP7iIQY/aWHPPbP24M/w2qqFpx+FSdabdQ6sCFg9Jjcd k2zb0UhSbJdyv4o6T7s5Ny8hENTN13dKfaJEa1BXwlpGyw2S8er4Qm3sd7gQCtGQeI4L kA6w== X-Gm-Message-State: AOAM531JXb0E7E0W9+Rk1A5WxtbRHyX5e3WX2cI2zwyy7CSXjUE49FTd M6azOZ8iyyCarP9q0oeHlDybS/hE1FIj1dVqiqjGhg== X-Google-Smtp-Source: ABdhPJyTdWO6d+q9fhd07IL8nMwHUj2gsRujzQ7X0vesq+RzLMGAAF5jMlqXYtBOrbLZuoSHBig0sSqGcEuhxpz0/H4= X-Received: by 2002:a25:1905:: with SMTP id 5mr32679392ybz.302.1619018032125; Wed, 21 Apr 2021 08:13:52 -0700 (PDT) MIME-Version: 1.0 References: <20210412223617.8634-1-jbx6244@gmail.com> In-Reply-To: <20210412223617.8634-1-jbx6244@gmail.com> From: Bartosz Golaszewski Date: Wed, 21 Apr 2021 17:13:41 +0200 Message-ID: Subject: Re: [PATCH v2 1/3] dt-bindings: gpio: add YAML description for rockchip,gpio-bank To: Johan Jonker Cc: =?UTF-8?Q?Heiko_St=C3=BCbner?= , Rob Herring , Linus Walleij , linux-gpio , linux-devicetree , arm-soc , "open list:ARM/Rockchip SoC..." , LKML Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Tue, Apr 13, 2021 at 12:36 AM Johan Jonker wrote: > > Current dts files with "rockchip,gpio-bank" subnodes > are manually verified. In order to automate this process > the text that describes the compatible in rockchip,pinctrl.txt > is removed and converted to YAML in rockchip,gpio-bank.yaml. > > Signed-off-by: Johan Jonker > --- > Changed V2: > changed example gpio nodename > --- > .../bindings/gpio/rockchip,gpio-bank.yaml | 82 ++++++++++++++++++++++ > .../bindings/pinctrl/rockchip,pinctrl.txt | 58 +-------------- > 2 files changed, 83 insertions(+), 57 deletions(-) > create mode 100644 Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml > > diff --git a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml > new file mode 100644 > index 000000000..d993e002c > --- /dev/null > +++ b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml > @@ -0,0 +1,82 @@ > +# SPDX-License-Identifier: GPL-2.0 > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/gpio/rockchip,gpio-bank.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Rockchip GPIO bank > + > +maintainers: > + - Heiko Stuebner > + > +properties: > + compatible: > + enum: > + - rockchip,gpio-bank > + - rockchip,rk3188-gpio-bank0 > + > + reg: > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > + clocks: > + maxItems: 1 > + > + gpio-controller: true > + > + "#gpio-cells": > + const: 2 > + > + interrupt-controller: true > + > + "#interrupt-cells": > + const: 2 > + > +required: > + - compatible > + - reg > + - interrupts > + - clocks > + - gpio-controller > + - "#gpio-cells" > + - interrupt-controller > + - "#interrupt-cells" > + > +additionalProperties: false > + > +examples: > + - | > + #include > + pinctrl: pinctrl { > + #address-cells = <1>; > + #size-cells = <1>; > + ranges; > + > + gpio0: gpio@2000a000 { > + compatible = "rockchip,rk3188-gpio-bank0"; > + reg = <0x2000a000 0x100>; > + interrupts = ; > + clocks = <&clk_gates8 9>; > + > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpio1: gpio@2003c000 { > + compatible = "rockchip,gpio-bank"; > + reg = <0x2003c000 0x100>; > + interrupts = ; > + clocks = <&clk_gates8 10>; > + > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + }; > diff --git a/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt > index d3eae61a3..4719a6a07 100644 > --- a/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt > +++ b/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt > @@ -50,23 +50,7 @@ Deprecated properties for iomux controller: > Use rockchip,grf and rockchip,pmu described above instead. > > Required properties for gpio sub nodes: > - - compatible: "rockchip,gpio-bank" > - - reg: register of the gpio bank (different than the iomux registerset) > - - interrupts: base interrupt of the gpio bank in the interrupt controller > - - clocks: clock that drives this bank > - - gpio-controller: identifies the node as a gpio controller and pin bank. > - - #gpio-cells: number of cells in GPIO specifier. Since the generic GPIO > - binding is used, the amount of cells must be specified as 2. See generic > - GPIO binding documentation for description of particular cells. > - - interrupt-controller: identifies the controller node as interrupt-parent. > - - #interrupt-cells: the value of this property should be 2 and the interrupt > - cells should use the standard two-cell scheme described in > - bindings/interrupt-controller/interrupts.txt > - > -Deprecated properties for gpio sub nodes: > - - compatible: "rockchip,rk3188-gpio-bank0" > - - reg: second element: separate pull register for rk3188 bank0, use > - rockchip,pmu described above instead > +See rockchip,gpio-bank.yaml > > Required properties for pin configuration node: > - rockchip,pins: 3 integers array, represents a group of pins mux and config > @@ -127,43 +111,3 @@ uart2: serial@20064000 { > pinctrl-names = "default"; > pinctrl-0 = <&uart2_xfer>; > }; > - > -Example for rk3188: > - > - pinctrl@20008000 { > - compatible = "rockchip,rk3188-pinctrl"; > - rockchip,grf = <&grf>; > - rockchip,pmu = <&pmu>; > - #address-cells = <1>; > - #size-cells = <1>; > - ranges; > - > - gpio0: gpio0@2000a000 { > - compatible = "rockchip,rk3188-gpio-bank0"; > - reg = <0x2000a000 0x100>; > - interrupts = ; > - clocks = <&clk_gates8 9>; > - > - gpio-controller; > - #gpio-cells = <2>; > - > - interrupt-controller; > - #interrupt-cells = <2>; > - }; > - > - gpio1: gpio1@2003c000 { > - compatible = "rockchip,gpio-bank"; > - reg = <0x2003c000 0x100>; > - interrupts = ; > - clocks = <&clk_gates8 10>; > - > - gpio-controller; > - #gpio-cells = <2>; > - > - interrupt-controller; > - #interrupt-cells = <2>; > - }; > - > - ... > - > - }; > -- > 2.11.0 > Applied, thanks! Bartosz