From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C4F56C43215 for ; Tue, 3 Dec 2019 18:57:34 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A26F62084B for ; Tue, 3 Dec 2019 18:57:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726766AbfLCS5e (ORCPT ); Tue, 3 Dec 2019 13:57:34 -0500 Received: from mail-oi1-f196.google.com ([209.85.167.196]:46028 "EHLO mail-oi1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726057AbfLCS5d (ORCPT ); Tue, 3 Dec 2019 13:57:33 -0500 Received: by mail-oi1-f196.google.com with SMTP id v10so2264651oiv.12; Tue, 03 Dec 2019 10:57:33 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=QbBA1xUeDWozSALaq+ZgoDJg/avbhvBYLtHk3XaCifw=; b=lsEzUPIx61+IoHiy8JrfhUXUZVGP/ZWFjLn6AqNtKxl6iD4RbfSQEkk7Fkwt3bg4Wk UAJX/OxaeKOS/HX7z/IjgB5YfdUCC9HN0r/nYkznbSrQqG9og6S248ij0i2wFKTiaEhg QrhAKfNPtUXulJfTHXFe+cM4PdFFPnebMNOGSoyA0KuyUN3OvKRVEcFTTTif6Xneu9MP uvKpfT1dSejPwT3J85mFuJuXqCbLHsUAgJRWRVtpwD44fDMUB9piyrjVpPWuBkbRv5WV T/dfcEWa6fs7OvS6kFslantWWcK/0id8xuViWrlJo6pKcbOuyGiW8/KEj0qf51EoYExN hO2Q== X-Gm-Message-State: APjAAAU9/SmzCLbb9/VwSnfi6RdbkaG0N/QrSCuNnhSt4lKqyBBSrH76 bP5/HglNvrKbvbLUfuF7xao5bnfdhTrCiaRZJ8w= X-Google-Smtp-Source: APXvYqyKgyiMygfjiXO8XcBZrxs1x7n6N0Y2SMTF6gDNv+MIgPG02RwFvT17WjD20296e3XHU/UN+EWiy7fHSp6VNgs= X-Received: by 2002:aca:48cd:: with SMTP id v196mr5098702oia.102.1575399452736; Tue, 03 Dec 2019 10:57:32 -0800 (PST) MIME-Version: 1.0 References: <20191203034519.5640-1-chris.brandt@renesas.com> <20191203034519.5640-7-chris.brandt@renesas.com> In-Reply-To: <20191203034519.5640-7-chris.brandt@renesas.com> From: Geert Uytterhoeven Date: Tue, 3 Dec 2019 19:57:21 +0100 Message-ID: Subject: Re: [PATCH 6/6] dt-bindings: spi: Document Renesas SPIBSC bindings To: Chris Brandt Cc: Mark Brown , Rob Herring , Mark Rutland , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , linux-spi , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Linux-Renesas , linux-clk , Mason Yang , Sergei Shtylyov Content-Type: text/plain; charset="UTF-8" Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hi Chris, On Tue, Dec 3, 2019 at 4:47 AM Chris Brandt wrote: > Document the bindings used by the Renesas SPI bus space controller. > > Signed-off-by: Chris Brandt Thanks for your patch! > --- /dev/null > +++ b/Documentation/devicetree/bindings/spi/spi-renesas-spibsc.txt Checkpatch.pl says: WARNING: DT bindings should be in DT schema format. See: Documentation/devicetree/writing-schema.rst > @@ -0,0 +1,48 @@ > +Renesas SPI Bus Space Controller (SPIBSC) Device Tree Bindings > + > +Otherwise referred to as the "SPI Multi I/O Bus Controller" in SoC hardware > +manuals. This controller was designed specifically for accessing SPI flash > +devices. > + > +Required properties: > +- compatible: should be an SoC-specific compatible value, followed by > + "renesas,spibsc" as a fallback. > + supported SoC-specific values are: > + "renesas,r7s72100-spibsc" (RZ/A1) > + "renesas,r7s9210-spibsc" (RZ/A2) Is the fallback valid for RZ/A1, which has its own special match entry in the driver? Will it be valid for R-Car Gen3? If not, you may want to drop it completely. > +- reg: should contain three register areas: > + first for the base address of SPIBSC registers, > + second for the direct mapping read mode > +- clocks: should contain the clock phandle/specifier pair for the module clock. > +- power-domains: should contain the power domain phandle/specifier pair. > +- #address-cells: should be 1 > +- #size-cells: should be 0 > +- flash: should be represented by a subnode of the SPIBSC node, > + its "compatible" property contains "jedec,spi-nor" if SPI is used. What about the "mtd-rom" use for e.g. XIP? interrupts? RZ/A2M seems to have an SPIBSC interrupt, RZ/A1 hasn't. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds