From: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
To: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Cc: MSM <linux-arm-msm@vger.kernel.org>,
konrad.dybcio@somainline.org, marijn.suijten@somainline.org,
martin.botka@somainline.org, phone-devel@vger.kernel.org,
lkml <linux-kernel@vger.kernel.org>,
Andy Gross <agross@kernel.org>,
Bjorn Andersson <bjorn.andersson@linaro.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>,
linux-clk@vger.kernel.org, DTML <devicetree@vger.kernel.org>
Subject: Re: [PATCH 1/9] clk: qcom: gcc-msm8998: Wire up gcc_mmss_gpll0 clock
Date: Thu, 14 Jan 2021 15:33:29 -0700 [thread overview]
Message-ID: <CAOCk7Nod9a+5EUUWGpso+EBb2dJVLMvjrOoMpqeTcm+L6mxvtQ@mail.gmail.com> (raw)
In-Reply-To: <9942f98c-c186-5cd0-d6ac-a18a4e20583e@somainline.org>
On Thu, Jan 14, 2021 at 3:13 PM AngeloGioacchino Del Regno
<angelogioacchino.delregno@somainline.org> wrote:
>
> Il 14/01/21 23:12, Jeffrey Hugo ha scritto:
> > On Sat, Jan 9, 2021 at 6:47 AM AngeloGioacchino Del Regno
> > <angelogioacchino.delregno@somainline.org> wrote:
> >>
> >> This clock enables the GPLL0 output to the multimedia subsystem
> >> clock controller.
> >>
> >> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
> >
> > Any reason why you are not also adding the div_clk?
> >
>
> Yes, just one: I haven't tested it... and my devices worked without.
> Perhaps we can add it whenever we find out if something really needs it?
I'm mildly surprised you need to turn on the gate to the PLL0 out, but
not the div_out. The div_out/div_clk is also fed into every RCG that
exists in the MMCC.
Per the frequency plan the following RCGs require it -
cci
cpp
fd_core
camss_gp[0-1]
jpeg0
mclk[0-3]
csi[0-2]phytimer
dp_gtc
maxi
axi
ahb
Also, I'm very interested in all things 8998, and would generally
appreciate being added to the to: list.
next prev parent reply other threads:[~2021-01-14 22:34 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-09 13:46 [PATCH 0/9] Clock fixes for MSM8998 GCC, MMCC, GPUCC AngeloGioacchino Del Regno
2021-01-09 13:46 ` [PATCH 1/9] clk: qcom: gcc-msm8998: Wire up gcc_mmss_gpll0 clock AngeloGioacchino Del Regno
2021-01-14 19:07 ` Rob Herring
2021-01-14 21:44 ` AngeloGioacchino Del Regno
2021-01-14 22:12 ` Jeffrey Hugo
2021-01-14 22:13 ` AngeloGioacchino Del Regno
2021-01-14 22:33 ` Jeffrey Hugo [this message]
2021-01-14 22:40 ` AngeloGioacchino Del Regno
2021-01-14 22:44 ` Jeffrey Hugo
2021-01-14 22:49 ` AngeloGioacchino Del Regno
2021-01-09 13:46 ` [PATCH 2/9] clk: qcom: gcc-msm8998: Add missing hmss_gpll0_clk_src clock AngeloGioacchino Del Regno
2021-01-09 13:46 ` [PATCH 3/9] clk: qcom: gcc-msm8998: Mark gpu_cfg_ahb_clk as critical AngeloGioacchino Del Regno
2021-01-09 13:46 ` [PATCH 4/9] clk: qcom: gcc-msm8998: Fix Alpha PLL type for all GPLLs AngeloGioacchino Del Regno
2021-01-09 13:46 ` [PATCH 5/9] clk: qcom: mmcc-msm8998: Set CLK_GET_RATE_NOCACHE to pixel/byte clks AngeloGioacchino Del Regno
2021-01-09 13:46 ` [PATCH 6/9] clk: qcom: mmcc-msm8998: Add hardware clockgating registers to some clks AngeloGioacchino Del Regno
2021-01-09 13:46 ` [PATCH 7/9] clk: qcom: mmcc-msm8998: Set bimc_smmu_gdsc always on AngeloGioacchino Del Regno
2021-01-09 13:46 ` [PATCH 8/9] clk: qcom: gpucc-msm8998: Add resets, cxc, fix flags on gpu_gx_gdsc AngeloGioacchino Del Regno
2021-01-09 13:46 ` [PATCH 9/9] clk: qcom: gpucc-msm8998: Allow fabia gpupll0 rate setting AngeloGioacchino Del Regno
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