devicetree.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: hammer hsieh <hammerh0314@gmail.com>
To: Jiri Slaby <jirislaby@kernel.org>
Cc: Greg KH <gregkh@linuxfoundation.org>,
	robh+dt@kernel.org, linux-serial@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	p.zabel@pengutronix.de, wells.lu@sunplus.com,
	"hammer.hsieh" <hammer.hsieh@sunplus.com>
Subject: Re: [PATCH v6 2/2] serial:sunplus-uart:Add Sunplus SoC UART Driver
Date: Fri, 14 Jan 2022 10:22:56 +0800	[thread overview]
Message-ID: <CAOX-t573QkixRC7xa1KUOYXfL12Q+Ltxph9rX7V8tm2BMoqxgA@mail.gmail.com> (raw)
In-Reply-To: <2cde3ff0-5180-7c1e-82fd-7b58e41d462a@kernel.org>

Jiri Slaby <jirislaby@kernel.org> 於 2022年1月13日 週四 下午7:12寫道:
>
> On 13. 01. 22, 11:56, hammer hsieh wrote:
> >> Could you explain me what posted write is and how does it not matter in
> >> this case?
> >>
> >
> > Each UART ISC register contains
>
> No, you still don't follow what I write. Use your favorite web search
> for "posted write" and/or consult with your HW team.
>

Maybe this time, we are on the same page.
Our SP7021 chipset is designed on ARM Cortex-A7 Quad core.
Register Access through AMBA(AXI bus), and it is non-cached.

Did you mean
case1 have concern about "posted write", and you want to know why it not matter?
case2 will be safer?

Case1 :
spin_lock_irq_save()
writel(0, target register)
spin_unlock_irqrestore()
Case2 :
spin_lock_irq_save()
tmp = readl(target register)
tmp &= ~(bit4 | bit5)
writel(tmp, target register)
spin_unlock_irqrestore()

I test uart port with linux-serial-test tool.
Ex. send char
linux-serial-test -y 0x55 -z 0x31 -p /dev/ttySUPx -b 115200
driver will call from uart startup till uart shutdown.
And it works fine, so I didn't think about "posted write" on Register bus.

> --
> js
> suse labs

  reply	other threads:[~2022-01-14  2:22 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-12  9:24 [PATCH v6 0/2] Add UART driver for Suplus SP7021 SoC Hammer Hsieh
2022-01-12  9:24 ` [PATCH v6 1/2] dt-bindings:serial:Add bindings doc for Sunplus SoC UART Driver Hammer Hsieh
2022-01-12  9:24 ` [PATCH v6 2/2] serial:sunplus-uart:Add " Hammer Hsieh
2022-01-13  7:06   ` Jiri Slaby
2022-01-13  8:54     ` hammer hsieh
2022-01-13  9:08       ` Jiri Slaby
2022-01-13 10:56         ` hammer hsieh
2022-01-13 11:12           ` Jiri Slaby
2022-01-14  2:22             ` hammer hsieh [this message]
2022-01-26 13:47               ` Greg KH
2022-01-28  3:36                 ` hammer hsieh

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=CAOX-t573QkixRC7xa1KUOYXfL12Q+Ltxph9rX7V8tm2BMoqxgA@mail.gmail.com \
    --to=hammerh0314@gmail.com \
    --cc=devicetree@vger.kernel.org \
    --cc=gregkh@linuxfoundation.org \
    --cc=hammer.hsieh@sunplus.com \
    --cc=jirislaby@kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-serial@vger.kernel.org \
    --cc=p.zabel@pengutronix.de \
    --cc=robh+dt@kernel.org \
    --cc=wells.lu@sunplus.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).