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Wed, 4 Nov 2020 13:14:06 +0000 From: "Badel, Laurent" To: Andrew Lunn CC: Marco Felsch , "davem@davemloft.net" , "fugang.duan@nxp.com" , "kuba@kernel.org" , Heiner Kallweit , "linux@armlinux.org.uk" , "p.zabel@pengutronix.de" , "lgirdwood@gmail.com" , "broonie@kernel.org" , "robh+dt@kernel.org" , "richard.leitner@skidata.com" , "netdev@vger.kernel.org" , "devicetree@vger.kernel.org" , "f.fainelli@gmail.com" , "Quette, Arnaud" Subject: RE: [EXTERNAL] Re: [PATCH net 0/4] Restore and fix PHY reset for SMSC LAN8720 Thread-Topic: [EXTERNAL] Re: [PATCH net 0/4] Restore and fix PHY reset for SMSC LAN8720 Thread-Index: AdasuCyaTCUfPNScQDqUis8Tkf1v8ABE58AAATXQQVAAAjmYAAAACv0Q Date: Wed, 4 Nov 2020 13:14:06 +0000 Message-ID: References: <20201029081626.wtnhctobwvlhmfan@pengutronix.de> <20201104131104.GV933237@lunn.ch> In-Reply-To: <20201104131104.GV933237@lunn.ch> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: lunn.ch; dkim=none (message not signed) header.d=none;lunn.ch; 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davem@davemloft.net; > fugang.duan@nxp.com; kuba@kernel.org; Heiner Kallweit > ; linux@armlinux.org.uk; p.zabel@pengutronix.de; > lgirdwood@gmail.com; broonie@kernel.org; robh+dt@kernel.org; > richard.leitner@skidata.com; netdev@vger.kernel.org; > devicetree@vger.kernel.org; f.fainelli@gmail.com; Quette, Arnaud > > Subject: Re: [EXTERNAL] Re: [PATCH net 0/4] Restore and fix PHY reset for > SMSC LAN8720 >=20 > > > > (ii) This defeats the purpose of a previous commit [2] that > > > > disabled the ref clock for power saving reasons. If a ref clock > > > > for the PHY is specified in DT, the SMSC driver will keep it > > > > always on (confirmed with scope). > > > > > > NACK, the clock provider can be any clock. This has nothing to do > > > with the FEC clocks. The FEC _can_ be used as clock provider. > > > > I'm sure you understand this much better than I do. What I can say is > > that I directly measured the ref clk and found that when I add the > > clock to the DT the clock stays on forever. Basically it seems like > > the FEC calls to > > clk_disable_unprepare() don't work in this case, though I'm not sure > > about the reason behind this. >=20 > The reason is easy to explain. The clock API is reference counted. It cou= nts > how many times a clock is turned on and off. A clock has to be turned off= as > many times as it was turned on before the hardware actually turns off. So > you have the FEC turning the clock on during probe, followed by the phy > turning the clock on. Some time later the FEC turns the clock off for run= time > power saving, but there is still one reference to the clock held by the P= HY, so > the hardware is left ticking. >=20 > Andrew That makes a lot of sense, thanks very much for the explanation.=20