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From: Leonard Crestez <leonard.crestez@nxp.com>
To: Adam Ford <aford173@gmail.com>, Jacky Bai <ping.bai@nxp.com>
Cc: "Stephen Boyd" <sboyd@kernel.org>,
	"Chanwoo Choi" <cw00.choi@samsung.com>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Mark Rutland" <mark.rutland@arm.com>,
	"Artur Świgoń" <a.swigon@partner.samsung.com>,
	"Viresh Kumar" <viresh.kumar@linaro.org>,
	"Michael Turquette" <mturquette@baylibre.com>,
	"Angus Ainslie" <angus@akkea.ca>,
	"Alexandre Bailon" <abailon@baylibre.com>,
	"Matthias Kaehlcke" <mka@chromium.org>,
	"Abel Vesa" <abel.vesa@nxp.com>,
	"Saravana Kannan" <saravanak@google.com>,
	"Krzysztof Kozlowski" <krzk@kernel.org>,
	linux-clk <linux-clk@vger.kernel.org>,
	"MyungJoo Ham" <myungjoo.ham@samsung.com>,
	dl-linux-imx <linux-imx@nxp.com>,
	devicetree <devicetree@vger.kernel.org>,
	"linux-pm@vger.kernel.org" <linux-pm@vger.kernel.org>,
	"Martin Kepplinger" <martink@posteo.de>,
	"Silvano Di Ninno" <silvano.dininno@nxp.com>,
	arm-soc <linux-arm-kernel@lists.infradead.org>,
	"Aisheng Dong" <aisheng.dong@nxp.com>,
	"Anson Huang" <anson.huang@nxp.com>,
	"Rafael J. Wysocki" <rjw@rjwysocki.net>,
	"Kyungmin Park" <kyungmin.park@samsung.com>,
	"Sascha Hauer" <kernel@pengutronix.de>,
	"Fabio Estevam" <fabio.estevam@nxp.com>,
	"Shawn Guo" <shawnguo@kernel.org>,
	"Georgi Djakov" <georgi.djakov@linaro.org>
Subject: Re: [PATCH v7 0/5] PM / devfreq: Add dynamic scaling for imx8m ddr controller
Date: Wed, 18 Dec 2019 15:16:31 +0000	[thread overview]
Message-ID: <VI1PR04MB70235951BC137515BDD2FDC7EE530@VI1PR04MB7023.eurprd04.prod.outlook.com> (raw)
In-Reply-To: CAHCN7xJNy0z2hvWbM3UhLni5ruS+sCLeBH8BKiYexe3Sp=6Q0w@mail.gmail.com

On 18.12.2019 17:05, Adam Ford wrote:
> On Wed, Dec 18, 2019 at 8:44 AM Leonard Crestez <leonard.crestez@nxp.com> wrote:
>>
>> On 18.12.2019 15:35, Adam Ford wrote:
>>> On Fri, Nov 22, 2019 at 3:45 PM Leonard Crestez <leonard.crestez@nxp.com> wrote:
>>>>
>>>> This adds support for dynamic scaling of the DDR Controller (ddrc)
>>>> present on i.MX8M series chips. Actual frequency switching is
>>>> implemented inside TF-A, this driver wraps the SMC calls and
>>>> synchronizes the clk tree.
>>>>
>>>> DRAM frequency switching requires clock manipulation but during this operation
>>>> DRAM itself is briefly inaccessible so this operation is performed a SMC call
>>>> to by TF-A which runs from a SRAM area. Upon returning to linux the clock tree
>>>> is updated to correspond to hardware configuration.
>>>>
>>>> This is handled via CLK_GET_RATE_NO_CACHE for dividers but muxes are handled
>>>> manually: the driver will prepare/enable the new parents ahead of switching (so
>>>> that the expected roots are enabled) and afterwards it will call clk_set_parent
>>>> to ensure the parents in clock framework are up-to-date.
>>>>
>>>> This series is useful standalone and roughly similar to devfreq drivers for
>>>> tegra and rockchip.
>>>>
>>>> Running at lower dram rates saves power but can affect the functionality of
>>>> other blocks in the chip (display, vpu etc). Support for in-kernel constraints
>>>> will some separately.
>>>>
>>>> This series has no dependencies outside linux-next. The driver depends
>>>> on features from the NXP branch of TF-A and will cleanly fail to probe
>>>> on mainline. There are also plans to upstream dram dvfs in TF-A.
>>>>
>>>> Leonard Crestez (5):
>>>>     clk: imx8m: Set CLK_GET_RATE_NOCACHE on dram clocks
>>>>     clk: imx: Mark dram pll on 8mm and 8mn with CLK_GET_RATE_NOCACHE
>>>>     dt-bindings: memory: Add bindings for imx8m ddr controller
>>>>     PM / devfreq: Add dynamic scaling for imx8m ddr controller
>>>>     arm64: dts: imx8m: Add ddr controller nodes
>>>>
>>>>    .../memory-controllers/fsl/imx8m-ddrc.yaml    |  72 +++
>>>>    arch/arm64/boot/dts/freescale/imx8mm-evk.dts  |  18 +
>>>>    arch/arm64/boot/dts/freescale/imx8mm.dtsi     |  10 +
>>>>    .../boot/dts/freescale/imx8mn-ddr4-evk.dts    |  18 +
>>>>    arch/arm64/boot/dts/freescale/imx8mn.dtsi     |  10 +
>>>>    arch/arm64/boot/dts/freescale/imx8mq-evk.dts  |  24 +
>>>>    arch/arm64/boot/dts/freescale/imx8mq.dtsi     |  10 +
>>>>    drivers/clk/imx/clk-imx8mm.c                  |  11 +-
>>>>    drivers/clk/imx/clk-imx8mn.c                  |  12 +-
>>>>    drivers/clk/imx/clk-imx8mq.c                  |  12 +-
>>>>    drivers/clk/imx/clk-pll14xx.c                 |   7 +
>>>>    drivers/clk/imx/clk.h                         |   1 +
>>>>    drivers/devfreq/Kconfig                       |   9 +
>>>
>>> Since there is a Kconfig change, should there me a defconfig change?
>>
>> Yes, you need to enable CONFIG_ARM_IMX8M_DDRC_DEVFREQ in order to test
>> this. Enabling as "m" should work.
> 
> I enabled it as 'm' but I was more curious to know if we should push
> this upstream with the rest of the series.

I skipped enabling because it's very experimental; maybe after imx 
interconnect is also enabled?

>>>>    drivers/devfreq/Makefile                      |   1 +
>>>>    drivers/devfreq/imx8m-ddrc.c                  | 465 ++++++++++++++++++
>>>>    15 files changed, 670 insertions(+), 10 deletions(-)
>>>>    create mode 100644 Documentation/devicetree/bindings/memory-controllers/fsl/imx8m-ddrc.yaml
>>>>    create mode 100644 drivers/devfreq/imx8m-ddrc.c
>>>
>>> I applied the whole series against 5.5-rc1 and I am trying to test it.
>>> I know the 4.14 kernel NXP posted on Code Aurora is capable to
>>> lowering the DDRC controller to 25MHz on the 8MM when the video is
>>> off.  Since there is no video support yet for the 8MM, I was expecting
>>> to see the DDRC clock to be at or around 25MHz.
>>>
>>> Using debug FS, I can see the dram core clock is still running at
>>> 750MHz, and measuring power, it shows something consistent with what I
>>> see on the Code Aurora kernel with video turned on and the clock at
>>> 750MHz.
>>>
>>> Is there some way to get the dram_core_clk to drop to 25MHz to see
>>> some power reduction?  The same commands used in the Yocto build don't
>>> apply here since we don't have video.
>>
>> Current upstream driver just keeps current frequency by default. Try the
>> following:
>>
>> cd /sys/class/devfreq/devices/devfreq0
> 
> can't cd to /sys/class/devfreq/devices/devfreq0: No such file or directory
> 
> I did some checking and I found:
>      imx8m-ddrc-devfreq 3d400000.memory-controller: failed to init
> firmware freq info: -19
> 
> Was there some prerequisite patches I needed to apply before your series?

You need a recent version of TF-A from nxp ( upstream). Try this:

https://source.codeaurora.org/external/imx/imx-atf/log/?h=imx_4.19.35_1.1.0

Or this: 
https://github.com/cdleonard/arm-trusted-firmware/commits/imx_2.0.y_busfreq

Support on upstream ATF is not yet available

--
Regards,
Leonard

  reply	other threads:[~2019-12-18 15:16 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-11-22 21:44 [PATCH v7 0/5] PM / devfreq: Add dynamic scaling for imx8m ddr controller Leonard Crestez
2019-11-22 21:45 ` [PATCH v7 1/5] clk: imx8m: Set CLK_GET_RATE_NOCACHE on dram clocks Leonard Crestez
2019-12-09  1:15   ` Shawn Guo
2019-11-22 21:45 ` [PATCH v7 2/5] clk: imx: Mark dram pll on 8mm and 8mn with CLK_GET_RATE_NOCACHE Leonard Crestez
2019-12-09  1:16   ` Shawn Guo
2019-11-22 21:45 ` [PATCH v7 3/5] dt-bindings: memory: Add bindings for imx8m ddr controller Leonard Crestez
2019-11-22 21:45 ` [PATCH v7 4/5] PM / devfreq: Add dynamic scaling " Leonard Crestez
2019-11-24 23:59   ` Chanwoo Choi
2019-11-26 19:44     ` Rob Herring
2019-11-26 23:25       ` Chanwoo Choi
     [not found]   ` <CGME20191219230258epcas1p16ec64c3a06eafd9f0a3784d18541ce5c@epcas1p1.samsung.com>
2019-12-19 23:09     ` [v8 PATCH] " Chanwoo Choi
2019-12-19 23:10       ` Chanwoo Choi
2019-11-22 21:45 ` [PATCH v7 5/5] arm64: dts: imx8m: Add ddr controller nodes Leonard Crestez
2019-11-28 14:43   ` Adam Ford
2019-11-29  5:33     ` Leonard Crestez
2019-12-09  1:34   ` Shawn Guo
2019-12-18 13:35 ` [PATCH v7 0/5] PM / devfreq: Add dynamic scaling for imx8m ddr controller Adam Ford
2019-12-18 14:44   ` Leonard Crestez
2019-12-18 15:05     ` Adam Ford
2019-12-18 15:16       ` Leonard Crestez [this message]
2019-12-18 15:37         ` Adam Ford
2019-12-18 16:22           ` Leonard Crestez
2019-12-18 16:42             ` Adam Ford
     [not found]               ` <CAHCN7xKjpN_XEGLj-1jMG5mBbF=su67k+10frheLt+L1XaR0-g@mail.gmail.com>
2020-01-13 23:36                 ` Leonard Crestez
2020-01-15 20:09                   ` Adam Ford

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