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Wysocki" , Anson Huang , Abel Vesa , Krzysztof Kozlowski , MyungJoo Ham , Kyungmin Park , Saravana Kannan , Mark Rutland , Viresh Kumar , Shawn Guo , Aisheng Dong , Fabio Estevam , Stephen Boyd , Michael Turquette , Matthias Kaehlcke , Angus Ainslie , Martin Kepplinger , Silvano Di Ninno , "linux-pm@vger.kernel.org" , "kernel@pengutronix.de" , dl-linux-imx , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" Subject: Re: [PATCH RFC v6 4/9] interconnect: Add imx core driver Thread-Topic: [PATCH RFC v6 4/9] interconnect: Add imx core driver Thread-Index: AQHVmyeaK7vaeB5iSEWDg4w8jXcbxw== Date: Thu, 19 Dec 2019 00:18:10 +0000 Message-ID: References: <48136159-21ba-c3b7-52c9-1d9d711644f7@linaro.org> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=leonard.crestez@nxp.com; x-originating-ip: [2a04:241e:500:9200:180b:59ec:7e1f:6ab4] x-ms-publictraffictype: Email x-ms-office365-filtering-ht: Tenant x-ms-office365-filtering-correlation-id: 1332c512-28b0-4e06-d42f-08d78418ee0d x-ms-traffictypediagnostic: VI1PR04MB5216:|VI1PR04MB5216: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:10000; 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charset="iso-8859-2" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 1332c512-28b0-4e06-d42f-08d78418ee0d X-MS-Exchange-CrossTenant-originalarrivaltime: 19 Dec 2019 00:18:10.1720 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 0ud55QVHI4YJ+ytbbh29pssh655Iym6sptpoLP0/aPo6dEQ/jOZVSWDkuSlxEiznt5RJKJynDWrz+lsC7xSb5Q== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR04MB5216 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 12.12.2019 09:29, Georgi Djakov wrote:=0A= > Hi Leonard,=0A= > =0A= > Thank you for your continuous work on the patches and sorry for not revie= wing=0A= > this earlier.=0A= > On 11/14/19 22:09, Leonard Crestez wrote:=0A= >> This adds support for i.MX SoC family to interconnect framework.=0A= >>=0A= >> Platform drivers can describe the interconnect graph and several=0A= >> adjustment knobs where icc node bandwidth is converted to a=0A= >> DEV_PM_QOS_MIN_FREQUENCY request.=0A= >>=0A= >> The interconnect provider is probed through the main NOC device and=0A= >> other adjustable nodes on the same graph are found from a=0A= >> fsl,scalable-nodes phandle array property.=0A= >>=0A= >> Signed-off-by: Alexandre Bailon =0A= >> Signed-off-by: Leonard Crestez =0A= =0A= >> +static int imx_icc_node_init_qos(struct icc_provider *provider,=0A= >> + struct icc_node *node)=0A= >> +{=0A= >> + struct imx_icc_node *node_data =3D node->data;=0A= >> + struct device *dev =3D provider->dev;=0A= >> + struct device_node *dn =3D NULL;=0A= >> + struct platform_device *pdev;=0A= >> + int i, count;=0A= >> + u32 node_id;=0A= >> + int ret;=0A= >> +=0A= >> + count =3D of_property_count_u32_elems(dev->of_node,=0A= >> + "fsl,scalable-node-ids");=0A= >> + if (count < 0) {=0A= >> + dev_err(dev, "Failed to parse fsl,scalable-node-ids: %d\n",=0A= >> + count);=0A= >> + return count;=0A= >> + }=0A= >> +=0A= >> + for (i =3D 0; i < count; i++) {=0A= >> + ret =3D of_property_read_u32_index(dev->of_node,=0A= >> + "fsl,scalable-node-ids",=0A= >> + i, &node_id);=0A= >> +=0A= >> + if (ret < 0) {=0A= >> + dev_err(dev, "Failed to parse fsl,scalable-node-ids[%d]: %d\n",=0A= >> + i, ret);=0A= >> + return ret;=0A= >> + }=0A= >> + if (node_id !=3D node->id)=0A= >> + continue;=0A= >> +=0A= >> + dn =3D of_parse_phandle(dev->of_node, "fsl,scalable-nodes", i);=0A= > =0A= > Why is this needed? I would expect that the interconnect provider driver = already=0A= > knows which nodes are scalable based on the platform compatible string.= =0A= > Then maybe this driver should create devfreq devices for each node that i= s scalable?=0A= =0A= The scalable nodes are independent devfreq instances which are probed =0A= through their own DT compat strings. It's even possible to reload =0A= imx8m-ddrc (the driver scaling the dram controller) at runtime.=0A= =0A= The most common solution to fetch other devices on DT systems is via =0A= phandles and fsl,scalable-nodes is a phandle array. Since the provider =0A= is platform-specific and knows the topology of the soc it could even use = =0A= of_find_node_by_path but that seems very messy. It's also quite brittle, = =0A= I've seen several bugs caused by DT node renaming.=0A= =0A= This support for arbitrary "scalable nodes" might be excessively generic = =0A= and strict DT compatibility might be difficult to maintain if too much =0A= is exposed. Changing per-soc driver data is otherwise easy.=0A= =0A= In vendor tree we only ever scale the main NOC and DDRC anyway so =0A= equivalent functionality could be achieved with a single "fsl,ddrc" =0A= phandle property on the noc.=0A= =0A= Support for scaling peripheral buses could be implemented by adding =0A= additional properties like "fsl,display-nic". Such a feature would need =0A= careful measurement on real hardware anyway.=0A= =0A= --=0A= Regards,=0A= Leonard=0A=