From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0FE1BC433EF for ; Wed, 6 Jul 2022 16:58:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232357AbiGFQ6w (ORCPT ); Wed, 6 Jul 2022 12:58:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50682 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233758AbiGFQ6i (ORCPT ); Wed, 6 Jul 2022 12:58:38 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 31A3B2A728; Wed, 6 Jul 2022 09:57:11 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id BA35261DAD; Wed, 6 Jul 2022 16:57:10 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 555C8C3411C; Wed, 6 Jul 2022 16:57:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1657126630; bh=GF/aKIAzhOdpyO5Xdb1pXVqwDvZ44YUeDjQ86DdLEVU=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=B7UfPWR6H7wHVWrVGgUXtsz5mVegP0uqNRm7Rl0GaG6lSk3/XF0bJ1dRDz910/nrw ArJlrBbcmQVUkXNEozaNrykOgZ0XjbILwzH8Eig5ZPcPfEFKMTk1JzxGSdij9yq67/ xOtgyfqkH+q2ZHp2h9BXhpi1JfDk6uKgD51fVcSVBFpqrBwKzY7rLXfVsxlhUhgZM9 CMDchWma018hV0+3hZpxLL5P198TNxnQukwCj8zo74rOMxLjpft0GWboEFVGfNRYBH dVp5s+/IxNrMQyMbS6/mLBlKrb3ESTrf8ZNrF6Lyz4CJD9yebEDJ5ftpznp9zNLEc9 NUsajuj6c/aKA== Date: Wed, 6 Jul 2022 22:27:05 +0530 From: Vinod Koul To: Sean Anderson Cc: "David S . Miller" , Jakub Kicinski , Madalin Bucur , netdev@vger.kernel.org, Russell King , Paolo Abeni , linux-arm-kernel@lists.infradead.org, Eric Dumazet , linux-kernel@vger.kernel.org, Ioana Ciornei , Jonathan Corbet , Kishon Vijay Abraham I , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-doc@vger.kernel.org, linux-phy@lists.infradead.org Subject: Re: [PATCH net-next v2 04/35] [RFC] phy: fsl: Add Lynx 10G SerDes driver Message-ID: References: <20220628221404.1444200-1-sean.anderson@seco.com> <20220628221404.1444200-5-sean.anderson@seco.com> <431a014a-3a8f-fdc7-319e-29df52832128@seco.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <431a014a-3a8f-fdc7-319e-29df52832128@seco.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 05-07-22, 11:29, Sean Anderson wrote: > >> + /* TODO: wait for the PLL to lock */ > > > > when will this be added? > > I'm not sure. I haven't had any issues with this, and waiting on the lock bit is > only mentioned in some datasheets for this SerDes. On the LS1046A for example, > there is no mention of waiting for lock. okay maybe remove the comment then? > >> +static const struct clk_ops lynx_pll_clk_ops = { > >> + .enable = lynx_pll_enable, > >> + .disable = lynx_pll_disable, > >> + .is_enabled = lynx_pll_is_enabled, > >> + .recalc_rate = lynx_pll_recalc_rate, > >> + .round_rate = lynx_pll_round_rate, > >> + .set_rate = lynx_pll_set_rate, > >> +}; > > > > right, this should be a clk driver > > Well, it is a clock driver, effectively internal to the SerDes. There are a few > examples of this already (e.g. the qualcomm and cadence phys). It could of course > be split off, but I would prefer that they remained together. I would prefer clk driver is split and we maintain clean split b/w phy and clk -- ~Vinod