From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.4 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 475B2C2D0CD for ; Tue, 17 Dec 2019 09:53:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 09705207FF for ; Tue, 17 Dec 2019 09:53:59 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="x3rJkdm+" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727269AbfLQJx6 (ORCPT ); Tue, 17 Dec 2019 04:53:58 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:57748 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726700AbfLQJx6 (ORCPT ); Tue, 17 Dec 2019 04:53:58 -0500 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id xBH9rMam036474; Tue, 17 Dec 2019 03:53:22 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1576576402; bh=sjC9P+5EGLfEaiANywJJax5JS2fNv1hugy8emXNG8es=; h=Subject:To:CC:References:From:Date:In-Reply-To; b=x3rJkdm+BWQfvIbzJ1oVnL+WizxYrcddeo8dddy3pHYLbip8uDL+Qe6mOoFryyQlv oihaMycMv9T6MEr0528rlcSAqsA7Gdzkh3DxqqEAVgbV3iu5yodw6d3HQ/SVlIE5D7 rYbqsjj0WX5gYj9PwV9DGL4l8zuTJlmaUyCClj0k= Received: from DFLE100.ent.ti.com (dfle100.ent.ti.com [10.64.6.21]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id xBH9rMIa009450 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 17 Dec 2019 03:53:22 -0600 Received: from DFLE107.ent.ti.com (10.64.6.28) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Tue, 17 Dec 2019 03:53:21 -0600 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE107.ent.ti.com (10.64.6.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Tue, 17 Dec 2019 03:53:21 -0600 Received: from [192.168.2.6] (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id xBH9rJn7073216; Tue, 17 Dec 2019 03:53:19 -0600 Subject: Re: [PATCH 00/14] Remove legacy sdma code for dt booting omaps To: Tony Lindgren , CC: Vinod Koul , , , Aaro Koskinen , Arnd Bergmann , Russell King , Vinod Koul , References: <20191217001925.44558-1-tony@atomide.com> From: Peter Ujfalusi Message-ID: Date: Tue, 17 Dec 2019 11:53:34 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.9.0 MIME-Version: 1.0 In-Reply-To: <20191217001925.44558-1-tony@atomide.com> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 8bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hi Tony, On 17/12/2019 2.19, Tony Lindgren wrote: > Hi all, > > This series finally removes the legacy sdma code for omaps booting with > devicetree. The legacy sdma code is still left for omap1, but makes > further work a bit easier. > > We do the removal of legacy sdma code with the following steps: > > - Prepare for platform data removal by probing sdma with device tree > data for the interconnect target module > > - Drop unused code and legacy interrupt code for omap2 and later > > - Update dmaengine driver to use device tree match data and add > missing features > > - Allocate logical channels directly in the dmaengine driver > > - Drop legacy platform init and data Thanks for doing this! First things first: Acked-by: Peter Ujfalusi Tested-by: Peter Ujfalusi But I was only able to test it with CPU_IDLE=n otherwise (even w/o this series) I got a flood of (PandaBoard-ES): [ 315.995819] ------------[ cut here ]------------ [ 316.000457] WARNING: CPU: 0 PID: 0 at drivers/bus/omap_l3_noc.c:141 l3_interrupt_handler+0x264/0x384 [ 316.009613] 44000000.ocp:L3 Standard Error: MASTER USBHOSTHS TARGET ABE (Read Link): At Address: 0x00000000 : Data Access in User mode during Functional access [ 316.023925] Modules linked in: [ 316.027008] CPU: 0 PID: 0 Comm: swapper/0 Tainted: G W 5.5.0-rc1-00016-g239582d9ad0c #1078 [ 316.036590] Hardware name: Generic OMAP4 (Flattened Device Tree) [ 316.042633] [] (unwind_backtrace) from [] (show_stack+0x10/0x14) [ 316.050415] [] (show_stack) from [] (dump_stack+0xc0/0xdc) [ 316.057678] [] (dump_stack) from [] (__warn+0xa8/0xd4) [ 316.064575] [] (__warn) from [] (warn_slowpath_fmt+0x94/0xbc) [ 316.072204] [] (warn_slowpath_fmt) from [] (l3_interrupt_handler+0x264/0x384) [ 316.081176] [] (l3_interrupt_handler) from [] (__handle_irq_event_percpu+0x3c/0x128) [ 316.090698] [] (__handle_irq_event_percpu) from [] (handle_irq_event_percpu+0x30/0x84) [ 316.100433] [] (handle_irq_event_percpu) from [] (handle_irq_event+0x38/0x5c) [ 316.109344] [] (handle_irq_event) from [] (handle_fasteoi_irq+0xc8/0x180) [ 316.117889] [] (handle_fasteoi_irq) from [] (generic_handle_irq+0x20/0x34) [ 316.127197] [] (generic_handle_irq) from [] (__handle_domain_irq+0x64/0xdc) [ 316.135955] [] (__handle_domain_irq) from [] (gic_handle_irq+0x40/0x84) [ 316.144317] [] (gic_handle_irq) from [] (__irq_svc+0x6c/0xa8) [ 316.151855] Exception stack(0xc0f01e10 to 0xc0f01e58) [ 316.157348] 1e00: ffffabcf 2e645000 00000000 c0e64040 [ 316.166107] 1e20: 00000082 c0e63ffc c0f052c0 c0f00000 00000001 ee80c000 c0f052c0 c0fa19c4 [ 316.174316] 1e40: 00000000 c0f01e60 c013bc44 c0102278 60000153 ffffffff [ 316.181121] [] (__irq_svc) from [] (__do_softirq+0x78/0x280) [ 316.188568] [] (__do_softirq) from [] (irq_exit+0xa8/0xec) [ 316.195831] [] (irq_exit) from [] (__handle_domain_irq+0x6c/0xdc) [ 316.203674] [] (__handle_domain_irq) from [] (gic_handle_irq+0x40/0x84) [ 316.213134] [] (gic_handle_irq) from [] (__irq_svc+0x6c/0xa8) [ 316.221130] Exception stack(0xc0f01ee8 to 0xc0f01f30) [ 316.226196] 1ee0: 00000000 00000000 00010001 ffffffff eef01580 00000002 [ 316.234405] 1f00: ef4a8678 c0f0b750 c0f05124 eef0158c c0f05244 c0fa19c4 00000010 c0f01f38 [ 316.242645] 1f20: ef4a86e8 c0773734 60000153 ffffffff [ 316.247711] [] (__irq_svc) from [] (cpuidle_enter_state_coupled+0x2e4/0x428) [ 316.256530] [] (cpuidle_enter_state_coupled) from [] (cpuidle_enter+0x44/0x5c) [ 316.265533] [] (cpuidle_enter) from [] (do_idle+0x1d8/0x2a4) [ 316.272949] [] (do_idle) from [] (cpu_startup_entry+0x18/0x20) [ 316.280578] [] (cpu_startup_entry) from [] (start_kernel+0x3d0/0x46c) [ 316.288787] ---[ end trace be4a25d25ab32771 ]--- - Péter > The patches are against v5.5-rc1, and need the following fixes: > > 2c81f0f6d3f5 ("bus: ti-sysc: Fix iterating over clocks") > e709ed70d122 ("bus: ti-sysc: Fix missing reset delay handling") > 93c60483b5fe ("bus: ti-sysc: Fix missing force mstandby quirk handling") > 90bdfa0b05e3 ("ARM: OMAP2+: Fix ti_sysc_find_one_clockdomain to check for to_clk_hw_omap") > > To make testing easier, I've also pushed out a testing branch at [0][1]. > > Regards, > > Tony > > > [0] git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap.git omap-for-v5.6/sdma-testing > [1] https://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap.git/log/?h=omap-for-v5.6/sdma-testing > > > Tony Lindgren (14): > ARM: dts: Add generic compatible for omap sdma instances > ARM: dts: Configure interconnect target module for omap2 sdma > ARM: dts: Configure interconnect target module for omap3 sdma > ARM: OMAP2+: Drop unused sdma functions > ARM: OMAP2+: Drop sdma interrupt handling for mach-omap2 > ARM: OMAP2+: Configure sdma capabilities directly > ARM: OMAP2+: Configure dma_plat_info directly and drop dma_dev_attr > dmaengine: ti: omap-dma: Add device tree match data and use it for > cpu_pm > dmaengine: ti: omap-dma: Configure global priority register directly > dmaengine: ti: omap-dma: Pass sdma auxdata to driver and use it > dmaengine: ti: omap-dma: Allocate channels directly > dmaengine: ti: omap-dma: Use cpu notifier to block idle for omap2 > ARM: OMAP2+: Drop legacy init for sdma > ARM: OMAP2+: Drop legacy platform data for sdma > > arch/arm/boot/dts/dra7-l4.dtsi | 3 +- > arch/arm/boot/dts/omap2.dtsi | 43 +- > arch/arm/boot/dts/omap2430.dtsi | 4 + > arch/arm/boot/dts/omap3-n900.dts | 5 + > arch/arm/boot/dts/omap3.dtsi | 46 +- > arch/arm/boot/dts/omap36xx.dtsi | 4 + > arch/arm/boot/dts/omap4-l4.dtsi | 3 +- > arch/arm/boot/dts/omap5-l4.dtsi | 3 +- > arch/arm/mach-omap2/common.h | 3 + > arch/arm/mach-omap2/dma.c | 119 +---- > arch/arm/mach-omap2/omap_device.c | 170 ------- > arch/arm/mach-omap2/omap_device.h | 4 - > arch/arm/mach-omap2/omap_hwmod_2420_data.c | 34 -- > arch/arm/mach-omap2/omap_hwmod_2430_data.c | 34 -- > .../mach-omap2/omap_hwmod_2xxx_ipblock_data.c | 18 - > arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 61 --- > arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 69 --- > arch/arm/mach-omap2/omap_hwmod_54xx_data.c | 61 --- > arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 61 --- > arch/arm/mach-omap2/omap_hwmod_common_data.h | 1 - > arch/arm/mach-omap2/pdata-quirks.c | 1 + > arch/arm/mach-omap2/pm24xx.c | 22 +- > arch/arm/mach-omap2/pm34xx.c | 5 - > arch/arm/plat-omap/dma.c | 471 +----------------- > drivers/dma/ti/omap-dma.c | 288 ++++++++++- > include/linux/omap-dma.h | 18 - > 26 files changed, 391 insertions(+), 1160 deletions(-) > Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. 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