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[86.30.250.44]) by smtp.googlemail.com with ESMTPSA id x10sm5918379wrv.60.2019.12.19.02.58.17 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 19 Dec 2019 02:58:18 -0800 (PST) Subject: Re: [PATCH v2 2/4] nvmem: add support for the write-protect pin To: Khouloud Touil , bgolaszewski@baylibre.com, robh+dt@kernel.org, mark.rutland@arm.com, baylibre-upstreaming@groups.io Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-i2c@vger.kernel.org, linus.walleij@linaro.org References: <20191210154157.21930-1-ktouil@baylibre.com> <20191210154157.21930-3-ktouil@baylibre.com> From: Srinivas Kandagatla Message-ID: Date: Thu, 19 Dec 2019 10:58:17 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.8.0 MIME-Version: 1.0 In-Reply-To: <20191210154157.21930-3-ktouil@baylibre.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 10/12/2019 15:41, Khouloud Touil wrote: > The write-protect pin handling looks like a standard property that > could benefit other users if available in the core nvmem framework. > > Instead of modifying all the memory drivers to check this pin, make > the NVMEM subsystem check if the write-protect GPIO being passed > through the nvmem_config or defined in the device tree and pull it > low whenever writing to the memory. > > There was a suggestion for introducing the gpiodesc from pdata, but > as pdata is already removed it could be replaced by adding it to > nvmem_config. > > Reference: https://lists.96boards.org/pipermail/dev/2018-August/001056.html > > Signed-off-by: Khouloud Touil > --- > drivers/nvmem/core.c | 19 +++++++++++++++++-- > drivers/nvmem/nvmem.h | 2 ++ > include/linux/nvmem-provider.h | 3 +++ > 3 files changed, 22 insertions(+), 2 deletions(-) > > diff --git a/drivers/nvmem/core.c b/drivers/nvmem/core.c Acked-by: Srinivas Kandagatla