From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.3 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id ECC2BC4363C for ; Wed, 7 Oct 2020 20:50:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8BDB42083B for ; Wed, 7 Oct 2020 20:50:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726117AbgJGUu0 (ORCPT ); Wed, 7 Oct 2020 16:50:26 -0400 Received: from mail-out.m-online.net ([212.18.0.9]:34285 "EHLO mail-out.m-online.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726013AbgJGUu0 (ORCPT ); Wed, 7 Oct 2020 16:50:26 -0400 Received: from frontend01.mail.m-online.net (unknown [192.168.8.182]) by mail-out.m-online.net (Postfix) with ESMTP id 4C660t4cY7z1qwy2; Wed, 7 Oct 2020 22:50:22 +0200 (CEST) Received: from localhost (dynscan1.mnet-online.de [192.168.6.70]) by mail.m-online.net (Postfix) with ESMTP id 4C660t34KRz1qsnr; Wed, 7 Oct 2020 22:50:22 +0200 (CEST) X-Virus-Scanned: amavisd-new at mnet-online.de Received: from mail.mnet-online.de ([192.168.8.182]) by localhost (dynscan1.mail.m-online.net [192.168.6.70]) (amavisd-new, port 10024) with ESMTP id NnfHrPUND7wD; Wed, 7 Oct 2020 22:50:20 +0200 (CEST) X-Auth-Info: prnOaCjiGszRKaYzweVviO3xy8WWUfMmzVU3qkmtCZo= Received: from [IPv6:::1] (p578adb1c.dip0.t-ipconnect.de [87.138.219.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.mnet-online.de (Postfix) with ESMTPSA; Wed, 7 Oct 2020 22:50:20 +0200 (CEST) Subject: Re: [PATCH 1/5] Documentation: bindings: clk: Add bindings for i.MX8MM BLK_CTL To: Adam Ford Cc: arm-soc , Dong Aisheng , Abel Vesa , devicetree , Shawn Guo , =?UTF-8?Q?Guido_G=c3=bcnther?= , Rob Herring , NXP Linux Team , Fabio Estevam , Lucas Stach References: <20201003224555.163780-1-marex@denx.de> From: Marek Vasut Message-ID: Date: Wed, 7 Oct 2020 22:50:20 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.12.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 10/7/20 10:17 PM, Adam Ford wrote: > On Wed, Oct 7, 2020 at 3:08 PM Adam Ford wrote: >> >> On Wed, Oct 7, 2020 at 3:03 PM Marek Vasut wrote: >>> >>> On 10/7/20 9:52 PM, Adam Ford wrote: >>>> On Sun, Oct 4, 2020 at 12:53 AM Marek Vasut wrote: >>>>> >>>>> Add the i.MX8MM BLK_CTL compatible string to the list. >>> [...] >>>>> --- >>>>> Documentation/devicetree/bindings/clock/fsl,imx-blk-ctl.yaml | 1 + >>>>> 1 file changed, 1 insertion(+) >>>>> >>>> >>>> Is there a DTSI change part of this patch? I was going to try to test >>>> it, but I am not seeing a change to the imx8mm.dtsi, and I am not >>>> sure where to put the node. >>> >>> There are in fact quite a few other pieces you need to have in place, >>> this patchset in itself is not particularly useful, it is just infra for >>> the LCDIF and MIPI DSIM block control. You might want to wait until they >>> all land in next and test that result. >> >> I have several patches in place, the GPCv2, this block driver, >> enabling GPU DT node, I'm also working on the DSIM patch you posted. >> I was hoping to test them all together and reply to the various >> threads with tested-by. I also want to get my device tree stuff ready >> on the beacon boards so when everything lands, I can post DTS updates >> to enable the LCDIF, DSI, and the HDMI bridge. >> >> If you have a repo somewhere that has all these combined, I can just >> work on the final layer to enable the device tree plumbing on my >> board. I just need the imx8mm.dtsi changes for this, DSIM, and the >> LCDIF so I can finish the task. > > On that note, I also have a i.MX8M Nano board which is similar to my > 8MM. If I understood the 8MM clock block driver better, I hope to > adapt your changes for the Nano too. Once the GPCv2 driver is > accepted, I was also going to look at updating it to support the Nano > as well which also has the same DSIM and LCDIF as the 8MM as well and > a better GPU than the Mini but lacking the VPU. I don't have a branch, but I sent you the collected patches off-list.