From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.3 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1C83AC433ED for ; Thu, 1 Apr 2021 09:44:34 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C5AB9610C7 for ; Thu, 1 Apr 2021 09:44:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233840AbhDAJoC (ORCPT ); Thu, 1 Apr 2021 05:44:02 -0400 Received: from mx07-00178001.pphosted.com ([185.132.182.106]:59078 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229612AbhDAJnf (ORCPT ); Thu, 1 Apr 2021 05:43:35 -0400 Received: from pps.filterd (m0241204.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 1319gKom021282; Thu, 1 Apr 2021 11:43:16 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=subject : to : cc : references : from : message-id : date : mime-version : in-reply-to : content-type : content-transfer-encoding; s=selector1; bh=ElCTswr//GFCTAToCJhfoRZXnB9MVrksSyYjSKrxAoU=; b=Jqx/K1QwmWTis3eaCEw7rOD/e2XGnexB1jM0Kn6W6KfsQRexI8OipI+pwt05qsOB10mf NXSeO7mOPPOg2OaacbUVHBSeMzPJdSVkKgjDNcg4CmjFnmZoCHxaS3vOUpmvqOtFii9l 5hqI527BdNFlPoZ+ZfC5l0BeWduO09mYFaZmfANBpTPpSbdC9HMbbc8VyavSsJ+ob+tN dr6hMlmx3iiAlhGrNwaV+a2CKMiU6iH/JgI0dbOtEne7wThijrLPTgyo3JQtcbzJM4y/ 5T9DvcTZAbMk6KYkLSSMabeln/z2M9Fy4hiGF1xORtt/4t1qDFUQ842Ijf5qdBdGbK97 CA== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 37n291k6b9-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 01 Apr 2021 11:43:16 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 39B9110002A; Thu, 1 Apr 2021 11:43:16 +0200 (CEST) Received: from Webmail-eu.st.com (sfhdag2node3.st.com [10.75.127.6]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 2888222D63D; Thu, 1 Apr 2021 11:43:16 +0200 (CEST) Received: from lmecxl0912.lme.st.com (10.75.127.47) by SFHDAG2NODE3.st.com (10.75.127.6) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 1 Apr 2021 11:43:15 +0200 Subject: Re: [PATCH] ARM: dts: stm32: Add PTP clock to Ethernet controller To: Kurt Kanzenbach , Rob Herring , Maxime Coquelin , Alexandre Torgue CC: , , References: <20210316080644.19809-1-kurt@linutronix.de> From: Alexandre TORGUE Message-ID: Date: Thu, 1 Apr 2021 11:43:15 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <20210316080644.19809-1-kurt@linutronix.de> Content-Type: text/plain; charset="utf-8"; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [10.75.127.47] X-ClientProxiedBy: SFHDAG1NODE3.st.com (10.75.127.3) To SFHDAG2NODE3.st.com (10.75.127.6) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.369,18.0.761 definitions=2021-04-01_04:2021-03-31,2021-04-01 signatures=0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hi Kurt On 3/16/21 9:06 AM, Kurt Kanzenbach wrote: > Add the PTP clock to the Ethernet controller. Otherwise, the driver uses the > main clock to derive the PTP frequency which is not necessarily the correct one. > > Tested with linuxptp on Olimex STMP1-OLinuXino-LIME2. > > Signed-off-by: Kurt Kanzenbach > --- > arch/arm/boot/dts/stm32mp151.dtsi | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/arm/boot/dts/stm32mp151.dtsi b/arch/arm/boot/dts/stm32mp151.dtsi > index 3c75abacb374..d1f596ea2fd5 100644 > --- a/arch/arm/boot/dts/stm32mp151.dtsi > +++ b/arch/arm/boot/dts/stm32mp151.dtsi > @@ -1421,11 +1421,13 @@ > "mac-clk-tx", > "mac-clk-rx", > "eth-ck", > + "ptp_ref", > "ethstp"; > clocks = <&rcc ETHMAC>, > <&rcc ETHTX>, > <&rcc ETHRX>, > <&rcc ETHCK_K>, > + <&rcc ETHPTP_K>, > <&rcc ETHSTP>; > st,syscon = <&syscfg 0x4>; > snps,mixed-burst; > Applied on stm32-next. Thanks. Alex