From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8E1FCC433EF for ; Tue, 30 Nov 2021 09:52:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235597AbhK3Jzz convert rfc822-to-8bit (ORCPT ); Tue, 30 Nov 2021 04:55:55 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46938 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235524AbhK3Jzz (ORCPT ); Tue, 30 Nov 2021 04:55:55 -0500 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A21A0C061574 for ; Tue, 30 Nov 2021 01:52:36 -0800 (PST) Received: from lupine.hi.pengutronix.de ([2001:67c:670:100:3ad5:47ff:feaf:1a17] helo=lupine) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1mrzoB-0003kK-0n; Tue, 30 Nov 2021 10:52:19 +0100 Received: from pza by lupine with local (Exim 4.94.2) (envelope-from ) id 1mrzo9-0003oR-5R; Tue, 30 Nov 2021 10:52:17 +0100 Message-ID: Subject: Re: [v13 2/2] pwm: Add Aspeed ast2600 PWM support From: Philipp Zabel To: Billy Tsai , jdelvare@suse.com, linux@roeck-us.net, robh+dt@kernel.org, joel@jms.id.au, andrew@aj.id.au, lee.jones@linaro.org, thierry.reding@gmail.com, u.kleine-koenig@pengutronix.de, linux-hwmon@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org, linux-pwm@vger.kernel.org Cc: BMC-SW@aspeedtech.com Date: Tue, 30 Nov 2021 10:52:17 +0100 In-Reply-To: <20211129064329.27006-3-billy_tsai@aspeedtech.com> References: <20211129064329.27006-1-billy_tsai@aspeedtech.com> <20211129064329.27006-3-billy_tsai@aspeedtech.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8BIT User-Agent: Evolution 3.38.3-1 MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2001:67c:670:100:3ad5:47ff:feaf:1a17 X-SA-Exim-Mail-From: p.zabel@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: devicetree@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Mon, 2021-11-29 at 14:43 +0800, Billy Tsai wrote: [...] > + ret = clk_prepare_enable(priv->clk); > + if (ret) > + return dev_err_probe(dev, ret, "Couldn't enable clock\n"); > + > + ret = reset_control_deassert(priv->reset); > + if (ret) { > + dev_err_probe(dev, ret, "Couldn't deassert reset control\n"); > + goto err_disable_clk; > + } Is there any reason to keep the clocks running and the controller out of reset while the PWM outputs are disabled? regards Philipp