From: <Daire.McNamara@microchip.com>
To: <amurray@thegoodpenguin.co.uk>, <robh@kernel.org>,
<lorenzo.pieralisi@arm.com>, <linux-pci@vger.kernel.org>,
<bhelgaas@google.com>, <robh+dt@kernel.org>,
<devicetree@vger.kernel.org>
Cc: <Daire.McNamara@microchip.com>, <david.abdurachmanov@gmail.com>
Subject: [PATCH v14 0/2] PCI: microchip: Add host driver for Microchip PCIe controller
Date: Fri, 7 Aug 2020 13:21:38 +0000 [thread overview]
Message-ID: <eb2abaa7fc97a6e700a7c4ed37182820803414c3.camel@microchip.com> (raw)
This v14 patch adds support for the Microchip PCIe PolarFire PCIe
controller when configured in host (Root Complex) mode.
Updates since v13:
* Refactored to use pci_host_common_probe()
Updates since v12:
* Capitalised commit messages. Use specific subject line for dt-bindings
Updates since v11:
* Adjusted so yaml file passses make dt_binding_check
Updates since v10:
* Adjusted driver as per Rob Herring's comments, notably:
- use common PCI_MSI_FLAGS defines
- reduce storage of unnecessary vars in mc_pcie struct
- switched to read/write relaxed variants
- extended lock in msi_domain_alloc routine
- improved 32bit safety, switched from find_first_bit() to ilog2()
- removed unnecessary twiddle of eCAM config space
Updates since v9:
* Adjusted commit logs
* make dt_bindings_check passes
Updates since v8:
* Refactored as per Rob Herring's comments:
- bindings in schema format
- Adjusted licence to GPLv2.0
- Refactored access to config space between driver and common eCAM code
- Adopted pci_host_probe()
- Miscellanous other improvements
Updates since v7:
* Build for 64bit RISCV architecture only
Updates since v6:
* Refactored to use common eCAM driver
* Updated to CONFIG_PCIE_MICROCHIP_HOST etc
* Formatting improvements
* Removed code for selection between bridge 0 and 1
Updates since v5:
* Fixed Kconfig typo noted by Randy Dunlap
* Updated with comments from Bjorn Helgaas
Updates since v4:
* Fix compile issues.
Updates since v3:
* Update all references to Microsemi to Microchip
* Separate MSI functionality from legacy PCIe interrupt handling functionality
Updates since v2:
* Split out DT bindings and Vendor ID updates into their own patch
from PCIe driver.
* Updated Change Log
Updates since v1:
* Incorporate feedback from Bjorn Helgaas
Daire McNamara (2):
dt-bindings: PCI: microchip: Add Microchip PolarFire host binding
PCI: microchip: Add host driver for Microchip PCIe controller
.../bindings/pci/microchip,pcie-host.yaml | 93 +++
drivers/pci/controller/Kconfig | 9 +
drivers/pci/controller/Makefile | 1 +
drivers/pci/controller/pcie-microchip-host.c | 569 ++++++++++++++++++
4 files changed, 672 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml
create mode 100644 drivers/pci/controller/pcie-microchip-host.c
base-commit: 47ec5303d73ea344e84f46660fff693c57641386
--
2.17.1
next reply other threads:[~2020-08-07 13:21 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-07 13:21 Daire.McNamara [this message]
2020-08-07 13:23 ` [PATCH v14 1/2] dt-bindings: PCI: microchip: Add Microchip PolarFire host binding Daire.McNamara
2020-08-14 15:55 ` Rob Herring
2020-08-07 13:25 ` [PATCH v14 2/2] PCI: microchip: Add host driver for Microchip PCIe controller Daire.McNamara
2020-08-10 15:34 ` Rob Herring
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